UNIBUS map - Revision history

Jnc: /* PDP-11 Details */ correct word

2021-01-07T02:15:13Z

‎PDP-11 Details: correct word

Jnc: same in pdp-11's which have it

2021-01-07T02:14:08Z

same in pdp-11's which have it

Jnc: links

2020-06-22T15:59:24Z

links

Jnc: proper name, +links

2020-01-21T14:10:14Z

proper name, +links

Jnc: Make non-PDP-11 specific

2018-11-20T16:23:23Z

Make non-PDP-11 specific

Jnc: Add links, cat

2018-02-17T15:52:16Z

Add links, cat

Jnc: Mostly done

2016-08-11T13:48:49Z

Mostly done

New page

[[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of main memory have a '''UNIBUS map''' to allow [[DMA]] devices on the UNIBUS access to all of main memory.

(Such systems usually use a separate bus, such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the memory bus in the [[PDP-11/70]], between the CPU and main memory.)

When enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS address space to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)

==Details==

Each UNIBUS address space block has a pair of 16-bit registers which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)

There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)

All machines with a UNIBUS map start off with the map disabled; the software has to set it up and enable it before it commences operation. Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the bootstrap process, and initial system startup.

{{PDP-11}}

@@ Line 9: / Line 9: @@
 Each UNIBUS address space block has a pair of 16-[[bit]] [[register]]s which are concatenated to provide the 22-bit base [[address]] in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
-There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)
+There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some models, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)
 All machines with a UNIBUS map start with the map disabled; the [[software]] has to set it up and enable it before it commences operation.

@@ Line 3: / Line 3: @@
 (Such systems usually use a separate [[bus]], such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the Main Memory Bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
-On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any [[word]] boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
+In all PDP-11's which have a UNIBUS map, it has [[program compatible]] functionality: when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any [[word]] boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
 ==PDP-11 Details==
@@ Line 11: / Line 11: @@
 There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)
-All machines with a UNIBUS map start off with the map disabled; the [[software]] has to set it up and enable it before it commences operation.
+All machines with a UNIBUS map start with the map disabled; the [[software]] has to set it up and enable it before it commences operation.
 Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the [[bootstrap]] process, and initial system startup.
 [[Category: UNIBUS]]

@@ Line 1: / Line 1: @@
-Machines such as the [[KS10]] and [[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[DMA]] devices on the UNIBUS access to all of main memory.
+Machines such as the [[KS10]] and [[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[Direct Memory Access|DMA]] devices on the UNIBUS access to all of main memory.
-(Such systems usually use a separate bus, such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the Main Memory Bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
+(Such systems usually use a separate [[bus]], such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the Main Memory Bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
-On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
+On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any [[word]] boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
 ==PDP-11 Details==
-Each UNIBUS address space block has a pair of 16-bit [[register]]s which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
+Each UNIBUS address space block has a pair of 16-[[bit]] [[register]]s which are concatenated to provide the 22-bit base [[address]] in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
 There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)

@@ Line 1: / Line 1: @@
 Machines such as the [[KS10]] and [[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[DMA]] devices on the UNIBUS access to all of main memory.
-(Such systems usually use a separate bus, such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the memory bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
+(Such systems usually use a separate bus, such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the Main Memory Bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
-On the PDP-11's, When enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
+On the PDP-11's, when enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
 ==PDP-11 Details==
-Each UNIBUS address space block has a pair of 16-bit registers which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
+Each UNIBUS address space block has a pair of 16-bit [[register]]s which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
 There are 31 pairs, at locations 770200-770372, since the I/O 'page' (i.e. UNIBUS addresses 760000-777776) is not mapped. (In some systems, the '32nd' UNIBUS map register pair can be read or written, but it is not used.)
-All machines with a UNIBUS map start off with the map disabled; the software has to set it up and enable it before it commences operation.
+All machines with a UNIBUS map start off with the map disabled; the [[software]] has to set it up and enable it before it commences operation.
-Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the bootstrap process, and initial system startup.
+Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the [[bootstrap]] process, and initial system startup.
 [[Category: UNIBUS]]

@@ Line 1: / Line 1: @@
-[[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[DMA]] devices on the UNIBUS access to all of main memory.
+Machines such as the [[KS10]] and [[PDP-11]]s which have a [[UNIBUS]] and more than 248 Kbytes of [[main memory]] have a '''UNIBUS map''' to allow [[DMA]] devices on the UNIBUS access to all of main memory.
 (Such systems usually use a separate bus, such as the [[Extended UNIBUS]] in the [[PDP-11/44]] and [[PDP-11/24]], the [[Private Memory Interconnect]] in the [[PDP-11/84]], and the memory bus in the [[PDP-11/70]], between the [[Central Processing Unit|CPU]] and main memory.)
-When enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
+On the PDP-11's, When enabled, the UNIBUS map allows 8 Kbyte blocks of UNIBUS [[address space]] to be mapped to 8 Kbyte blocks (there is no ability to limit the size) of main memory, located on any word boundary. (I.e. the blocks of memory to which UNIBUS blocks are mapped are not restricted to be on 8 Kbyte boundaries themselves.)
-==Details==
+==PDP-11 Details==
 Each UNIBUS address space block has a pair of 16-bit registers which are concatenated to provide the 22-bit base address in main memory to which that block of UNIBUS address space is mapped. (Technically, the high-order register has only 6 bits, and the low-order register has only 15, since the block cannot be assigned to an odd address.)
@@ Line 15: / Line 15: @@
 Before that happens, the UNIBUS address space is statically mapped to the low 248 Kbytes of main memory; this allows the use of DMA devices on the UNIBUS during the bootstrap process, and initial system startup.
-{{PDP-11}}
+[[Category: UNIBUS]]