Upgrading QBUS backplanes - Revision history

Jnc: /* External links */ original at Frain Research went offline; add reference to online mirror

2025-05-30T13:31:25Z

‎External links: original at Frain Research went offline; add reference to online mirror

Jnc: Mention Q-Q backplane

2024-07-26T16:40:55Z

Mention Q-Q backplane

Jnc: /* External links */ +22-Bit Q-Bus Conversions

2023-07-10T00:11:57Z

‎External links: +22-Bit Q-Bus Conversions

Jnc: link grant lines

2019-11-21T14:26:51Z

link grant lines

Jnc: tweak wording

2019-11-15T19:32:59Z

tweak wording

Jnc: +cat, +links

2018-12-09T15:39:00Z

+cat, +links

Jnc: fmt

2018-01-06T13:03:24Z

fmt

Jnc: add links

2016-06-13T18:14:51Z

add links

Jnc: clarify

2016-06-11T22:53:41Z

clarify

Jnc: Format, typos

2015-12-28T15:27:47Z

Format, typos

@@ Line 37: / Line 37: @@
 ==External links==
-* [http://web.frainresearch.org:8080/projects/pdp-11/conv22.php 22-Bit Q-Bus Conversions]
+* [http://web.frainresearch.org:8080/projects/pdp-11/conv22.php 22-Bit Q-Bus Conversions] (mirrored [https://electrickery.nl/comp/pdp11_23plus/frain.rsx11m.io/conv22.php here])
 [[Category: QBUS]]

@@ Line 1: / Line 1: @@
-Upgrading a [[QBUS]] [[backplane]] from [[QBUS#Variable address size|18-bit]] to 22-bit is a fairly simple process. Basically, one has to wire pins [[DEC edge connector contact identification|BC1]], BD1, BE1 and BF1 (BDAL18-BDAL21, respectively) on all '''''QBUS''''' slots together into a bus. So one wires BC1 on slot 1 to BC1 on slot 2, slot 3, etc, etc.
+Upgrading a [[QBUS]] [[backplane]] from [[QBUS#Variable address size|18-bit]] to 22-bit is a fairly simple process. Basically, one has to wire pins [[DEC edge connector contact identification|BC1, BD1, BE1 and BF1]] (BDAL18-BDAL21, respectively) on all '''''QBUS''''' slots together into a bus. So, one wires BC1 on slot 1 to BC1 on slot 2, slot 3, etc, etc.
-A couple of notes: First, the '''''QBUS''''' is because if the backplane is a so-called [[QBUS#Backplanes|Q/CD backplane]], in which the [[DEC edge connector contact identification|C and D connectors]] are a [[CD interconnect]] private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the C/D connectors, bur rather only on the A-B connectors wired for QBUS (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
+A couple of notes: First, the '''''QBUS''''' is because if the backplane is a so-called [[QBUS#Backplanes|Q/CD backplane]], in which the [[DEC edge connector contact identification|C and D connectors]] are a [[CD interconnect]] private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the C/D connectors, but rather only on the A-B connectors wired for QBUS (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
 Second, for optimal analog behaviour, the 'out' slot on the backplane should be the last slot one wires to, so that there are no branches in the [[transmission line]]s for BDAL18-BDAL21 (which can produce [[transmission line|reflections]] - AKA noise - on the transmission lines). How to do this efficiently (in terms of the wiring) can be a bit tricky, depending on the backplane configuration.
-E.g. if one has the standard 'serpentine' backplane, i.e. one with the slots in the following kind of order (facing the backplane from the board side):
+E.g. if one has the standard 'serpentine' [[QBUS#Backplanes|Q/Q backplane]], i.e. one with the slots in the following kind of order (facing the backplane from the board side):
 -2<br>4-3<br>5-6<br>8-7<br>9-10
@@ Line 27: / Line 27: @@
 with a vertical run on the left side, stopping short of the last slot; then a diagonal up to a vertical run on the right side, then a lateral back across on the last layer.
-Obviously one ''could'' run the wires back and forth, in slot order, but that will take a lot more wire, which at the very least is more work (especially on backplanes which don't have full [[wire-wrap]] pins, just the little stubby pins that have to have the wires soldered to); whether it also increases the delay down those transmission lines enough to be noticeable is something that is not currently known.
+Obviously one ''could'' run the wires back and forth, in slot order, but that will take a lot more wire, which at the very least is more work (especially on backplanes which don't have full [[wire-wrap]] pins, just the little stubby pins that have to have the wires soldered to them); whether it also increases the delay down those transmission lines enough to be noticeable is something that is not currently known.
 All the obvious caveats apply: make sure not to get confused by the mirror pin and slot numbers on the front and back sides (the wiring will be on the back, whereas the diagrams above are on the front), etc.

← Older revision		Revision as of 00:11, 10 July 2023
Line 34:		Line 34:

	* [[QBUS backplanes]]		* [[QBUS backplanes]]
		+
		+	==External links==
		+
		+	* [http://web.frainresearch.org:8080/projects/pdp-11/conv22.php 22-Bit Q-Bus Conversions]

	[[Category: QBUS]]		[[Category: QBUS]]

@@ Line 9: / Line 9: @@
 -2<br>4-3<br>5-6<br>8-7<br>9-10
-etc., one might naively think one has to run the extra bus lines back and forth to match. However, only the ''grant'' lines have to follow this pattern (and they are already there); the added lines don't have to follow the same pattern, as long as there are no branches.
+etc., one might naively think one has to run the extra bus lines back and forth to match. However, only the [[bus grant line]]s have to follow this pattern (and they are already there); the added lines don't have to follow the same pattern, as long as there are no branches.
 So, for the example 5-slot (albeit 10 QBUS slots) backplane above, one could/would wire:

@@ Line 1: / Line 1: @@
 Upgrading a [[QBUS]] [[backplane]] from [[QBUS#Variable address size|18-bit]] to 22-bit is a fairly simple process. Basically, one has to wire pins [[DEC edge connector contact identification|BC1]], BD1, BE1 and BF1 (BDAL18-BDAL21, respectively) on all '''''QBUS''''' slots together into a bus. So one wires BC1 on slot 1 to BC1 on slot 2, slot 3, etc, etc.
-A couple of notes: First, the '''''QBUS''''' is because if the backplane is a so-called [[QBUS#Backplanes|Q/CD backplane]], in which the C and D slots are a [[CD interconnect]] private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the C/D slots, only the QBUS slots (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
+A couple of notes: First, the '''''QBUS''''' is because if the backplane is a so-called [[QBUS#Backplanes|Q/CD backplane]], in which the [[DEC edge connector contact identification|C and D connectors]] are a [[CD interconnect]] private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the C/D connectors, bur rather only on the A-B connectors wired for QBUS (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
-Second, for optimal analog behaviour, the 'out' slot on the backplane should be the last slot one wires to, so that there are no branches in the [[transmission line]] for BDAL18-BDAL21 (which can produce reflections - aka noise - on the transmission lines). How to do this efficiently (in terms of the wiring) can be a bit tricky, depending on the backplane configuration.
+Second, for optimal analog behaviour, the 'out' slot on the backplane should be the last slot one wires to, so that there are no branches in the [[transmission line]]s for BDAL18-BDAL21 (which can produce [[transmission line|reflections]] - AKA noise - on the transmission lines). How to do this efficiently (in terms of the wiring) can be a bit tricky, depending on the backplane configuration.
 E.g. if one has the standard 'serpentine' backplane, i.e. one with the slots in the following kind of order (facing the backplane from the board side):
@@ Line 27: / Line 27: @@
 with a vertical run on the left side, stopping short of the last slot; then a diagonal up to a vertical run on the right side, then a lateral back across on the last layer.
-Obviously one ''could'' run the wires back and forth, in slot order, but that will take a lot more wire, which at the very least is more work (especially on backplanes which don't have full wire-wrap pins, just the little stubby pins that have to have the wires soldered to); whether it also increases the delay down those transmission lines enough to be noticeable is something that is not currently known.
+Obviously one ''could'' run the wires back and forth, in slot order, but that will take a lot more wire, which at the very least is more work (especially on backplanes which don't have full [[wire-wrap]] pins, just the little stubby pins that have to have the wires soldered to); whether it also increases the delay down those transmission lines enough to be noticeable is something that is not currently known.
 All the obvious caveats apply: make sure not to get confused by the mirror pin and slot numbers on the front and back sides (the wiring will be on the back, whereas the diagrams above are on the front), etc.
 [[Category: QBUS]]

@@ Line 1: / Line 1: @@
-Upgrading a [[QBUS]] [[backplane]] from 18-bit to 22-bit is a fairly simple process. Basically, one has to wire pins BC1, BD1, BE1 and BF1 (BDAL 18-BDAL21, respectively) on all '''''QBUS''''' slots together into a bus. So one wires BC1 on slot 1 to BC1 on slot 2, slot 3, etc, etc.
+Upgrading a [[QBUS]] [[backplane]] from 18-bit to 22-bit is a fairly simple process. Basically, one has to wire pins BC1, BD1, BE1 and BF1 (BDAL18-BDAL21, respectively) on all '''''QBUS''''' slots together into a bus. So one wires BC1 on slot 1 to BC1 on slot 2, slot 3, etc, etc.
-A couple of notes: First, the '''''QBUS''''' is because if the backplane is a so-called [[QBUS#Backplanes|Q/CD backplane]], in which the C and D slots are a [[CD interconnect|private bus]] used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the C/D slots, only the QBUS slots (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
+A couple of notes: First, the '''''QBUS''''' is because if the backplane is a so-called [[QBUS#Backplanes|Q/CD backplane]], in which the C and D slots are a [[CD interconnect]] private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the C/D slots, only the QBUS slots (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
 Second, for optimal analog behaviour, the 'out' slot on the backplane should be the last slot one wires to, so that there are no branches in the [[transmission line]] for BDAL18-BDAL21 (which can produce reflections - aka noise - on the transmission lines). How to do this efficiently (in terms of the wiring) can be a bit tricky, depending on the backplane configuration.
@@ Line 17: / Line 17: @@
 i.e. a single vertical run on the left hand side, a single diagonal from 9 back to 2 (shown with "--"), and then another vertical run on the right hand side. Much simpler than wiring back and forth in slot order. There are no branches; and the last slot is the 'out' slot.
-For backplane with an _even_ number of quad slots, e.g.:
+For backplane with an ''even'' number of quad slots, e.g.:
 -2<br>4-3<br>5-6<br>8-7

@@ Line 1: / Line 1: @@
 Upgrading a [[QBUS]] [[backplane]] from 18-bit to 22-bit is a fairly simple process. Basically, one has to wire pins BC1, BD1, BE1 and BF1 (BDAL 18-BDAL21, respectively) on all ''QBUS'' slots together into a bus. So one wires BC1 on slot 1 to BC1 on slot 2, slot 3, etc, etc.
-A couple of notes: First, the ''QBUS'' is because if the backplane is a so-called Q/CD backplane, in which the CD slots are a private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the CD slots, only the QBUS slots (which run down the left-hand side, when facing the backplane).
+A couple of notes: First, the ''QBUS'' is because if the backplane is a so-called Q/CD backplane, in which the CD slots are a private bus used to connect together board pairs, clearly one doesn't run the extra BDAL lines to the CD slots, only the QBUS slots (which run down the left-hand side, when facing the side of the backplane where the boards plug in).
 Second, for optimal analog behaviour, the 'out' slot on the backplane should be the last slot one wires to, so that there are no branches in the [[transmission line]] for BDAL18-BDAL21 (which can produce reflections - aka noise - on the transmission lines). How to do this efficiently (in terms of the wiring) can be a bit tricky, depending on the backplane configuration.

@@ Line 7: / Line 7: @@
 E.g. if one has the standard 'serpentine' backplane, i.e. one with the slots in the following kind of order (facing the backplane from the board side):
--2 4-3 5-6 8-7 9-10
+-2<br>4-3<br>5-6<br>8-7<br>9-10
 etc., one might naively think one has to run the extra bus lines back and forth to match. However, only the ''grant'' lines have to follow this pattern (and they are already there); the added lines don't have to follow the same pattern, as long as there are no branches.
@@ Line 15: / Line 15: @@
 -4-5-8-9--2-3-6-7-10
-i.e. a single vertical run on the left hand side, a single diagonal from 9 back to 2 (shown with "--"), and then another vertical run on the right hand side. Much simpler than wiring back and forth in slot order; there are no branches; and the last slot is the 'out' slot.
+i.e. a single vertical run on the left hand side, a single diagonal from 9 back to 2 (shown with "--"), and then another vertical run on the right hand side. Much simpler than wiring back and forth in slot order. There are no branches; and the last slot is the 'out' slot.
 For backplane with an _even_ number of quad slots, e.g.:
--2 4-3 5-6 8-7
+-2<br>4-3<br>5-6<br>8-7
 it's a little more complicated: a single vertical run on each side cannot be connected in such a way as to have the 'out' slot (8) be the last slot. One has to do something a little more complex:
@@ Line 25: / Line 25: @@
 -4-5--2-3-6-7--8
-with a vertical run on the left side, stopping short of the last slot; then a vertical run on the right side, then a lateral back across on the last layer.
+with a vertical run on the left side, stopping short of the last slot; then a diagonal up to a vertical run on the right side, then a lateral back across on the last layer.
 Obviously one ''could'' run the wires back and forth, in slot order, but that will take a lot more wire, which at the very least is more work (especially on backplanes which don't have full wire-wrap pins, just the little stubby pins that have to have the wires soldered to); whether it also increases the delay down those transmission lines enough to be noticeable is something that is not currently known.
-All the obvious caveats apply: make sure not to get confused by the mirror pin and slot numbers on the front and back sides (the wiring will be qon the back, whereas the diagrams above are on the front), etc.
+All the obvious caveats apply: make sure not to get confused by the mirror pin and slot numbers on the front and back sides (the wiring will be on the back, whereas the diagrams above are on the front), etc.