Difference between revisions of "PDP-10"

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[[Image:PDP-10 1090.jpg|350px|right|thumb|A PDP-10 KL10 Model 1090]]
 
[[Image:PDP-10 1090.jpg|350px|right|thumb|A PDP-10 KL10 Model 1090]]
  
−
A series of large, [[List of 36-bit computers|36-bit]] [[word]] [[mainframe]]-like systems built by [[Digital Equipment Corporation|DEC]]. They were basically a re-implementation of the earlier [[PDP-6]] [[architecture]], whose [[hardware]] engineering had been a failure. (The machines were so similar at the programming level that PDP-6 [[object code]] could run on a PDP-10.)
+
A series of large, [[List of 36-bit computers|36-bit]] [[word]] [[mainframe]]-like systems built by [[Digital Equipment Corporation|DEC]]. They were basically a re-implementation of the earlier [[PDP-6]] [[instruction set architecture|ISA]], whose [[hardware]] engineering had been a failure. (The machines were so similar at the programming level that PDP-6 [[object code]] could run on a PDP-10.)
  
 
DEC sold 4 different generations of PDP-10 processors: the [[KA10]], the [[KI10]], the [[KL10]], and the small [[KS10]]. All except the KS10 were available in [[multi-processor]] versions with two [[Central Processing Unit|CPUs]].
 
DEC sold 4 different generations of PDP-10 processors: the [[KA10]], the [[KI10]], the [[KL10]], and the small [[KS10]]. All except the KS10 were available in [[multi-processor]] versions with two [[Central Processing Unit|CPUs]].
  
−
PDP-10s were very important machines on the early [[ARPANET]] and [[Internet]], being one of the few (relatively!) cheaply available machines which could run a full [[Network Control Program|NCP]] and later [[TCP/IP]] stack as a multi-user environment at the time.
+
PDP-10s were very important machines on the early [[ARPANET]] and [[Internet]], being one of the few (relatively!) cheaply available machines which could run a full [[Network Control Protocol|NCP]] and later [[TCP/IP]] stack as a multi-user environment at the time.
  
 
They still have a large following today, due in part to the innovative [[time-sharing]] [[operating system]]s written for them (especially [[Incompatible Timesharing System|ITS]]). There are several good [[simulator]]s available, notably [[SIMH]] and [[KLH10]].
 
They still have a large following today, due in part to the innovative [[time-sharing]] [[operating system]]s written for them (especially [[Incompatible Timesharing System|ITS]]). There are several good [[simulator]]s available, notably [[SIMH]] and [[KLH10]].
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===Busses===
 
===Busses===
  
−
DEC-10's supported a number of different busses; there are different types of bus for memory and [[peripheral]]s.
+
DEC-10's supported a number of different busses: there are different types of bus for main memory (the [[PDP-10 Memory Bus]]), and [[peripheral]]s. On the KA10 and KI10 models, the [[PDP-10 I/O Bus]] was provided for the latter; it allowed peripherals to [[interrupt]] the [[Central Processing Unit|CPU]], and supported [[programmed I/O]] (including block transfers).
  
−
There were three generations of main memory bus, and [[PDP-10 memories|memory systems]] to attach to them. The first two were the so-called 'external memory bus', in KA (18-bit [[address]]) and KI (22-bit) forms (for the KA10, and KI10 and early KL10, respectively), although they also had [[protocol]] differences. The last was the 'internal memory bus', the 'S-Bus' (for the later KL10s, a later version of the S-Bus, the X-Bus, differed only in the [[logic family]] it interfaced to). The  differences between the two external bus types required a [[KI10-M Memory Bus Adapter]] if KA-bit units were to be attached to a KI10. Similarly, KI-type units could be attached to the S-Bus using a [[DMA20 Memory Bus Adapter]].
+
On the KL10, an optional [[DIA20 In/Out Bus Controller]] could also be attached, to provide a KA10/KI10 compatible I/O bus. However, by the KL10 era, most low-speed peripherals were connected to [[front end]] computers, always DEC [[minicomputer]]s, which allowed the production of PDP-10-specific versions of all those devices to be dispensed with.
−
 
 
−
For peripherals, on the KA10 and KI10 an 'I/O bus' was provided. It allowed peripherals to [[interrupt]] the [[Central Processing Unit|CPU]], and supported [[programmed I/O]] (including block transfers); speeds of up to 200K transfers/second were possible on the KA10, and 350K transfers/second on the KIl0. The DT01C I/O Bus Switch allowed an device to be switched between two different CPUs. For [[Direct Memory Access|DMA]], [[mass storage]] peripherals connected directly to memories (PDP-10 memories are generally [[multi-port memory|multi-port]]).
 
−
 
 
−
On the KL10, an optional [[DIA20 In/Out Bus Controller]] could also be attached, to provide a KA10/KI10 compatible I/O bus.
 
  
 
The KS10, which was ''sui generis'', had its own custom memory bus, which appeared only on the main [[backplane]]. For I/O, it used the [[UNIBUS]] and (via [[RH11 MASSBUS controller|RH11]]'s) the [[MASSBUS]].
 
The KS10, which was ''sui generis'', had its own custom memory bus, which appeared only on the main [[backplane]]. For I/O, it used the [[UNIBUS]] and (via [[RH11 MASSBUS controller|RH11]]'s) the [[MASSBUS]].
  
−
[[Image:KBusQCLatched.jpg|250px|thumb|right|Memory bus Quick Latch connector (in latched position)]]
+
===Channels===
−
 
 
−
On the KA10, all the busses were physically instantiated as cables with a pair of [[DEC card form factor|dual]] width [[printed circuit board|PCBs]] at each end, which plugged into slots in a standard DEC [[backplane]]; these later became the CJ connectors. On the KI10 and KL10s with an external memory bus, the memory bus cables ended in a large QuickLatch connector; these connectors were also used on the CPU end of I/O bus cables of those machines.
 
  
−
===Devices===
+
For [[Direct Memory Access|DMA]], [[mass storage]] peripherals connected directly to memories (PDP-10 memories are generally [[multi-port memory|multi-port]]).
  
−
In the KA10 and KI10, high-speed mass storage [[device controller]]s generally connected to both i) a [[channel]], the [[DF10 Data Channel]], which attached to an external memory bus, and ii) the I/O bus. The CPU controlled the channel via the device controller. This setup was used to connect mass storage controllers, such as:
+
In the KA10 and KI10, high-speed mass storage [[device controller]]s generally connected to both i) a [[channel]], the [[DF10 Data Channel]], which was attached to an [[PDP-10 Memory Bus|external memory bus]], and ii) the PDP-10 I/O Bus. The CPU controlled the channel via the device controller. This setup was used to connect mass storage controllers, such as:
  
 
* [[RP10 disk controller]] - [[RP01 disk drive|RP01]], [[RP02 disk drive|RP02]] and [[RP03 disk drive]]s
 
* [[RP10 disk controller]] - [[RP01 disk drive|RP01]], [[RP02 disk drive|RP02]] and [[RP03 disk drive]]s
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The [[RH10 MASSBUS controller]] (which appeared toward the end of the KI10 period), for MASSBUS mass storage devices, was similarly connected (to a DF10 channel, and the I/O bus). On the KL10, up to 8 [[RH20 MASSBUS controller]]s, which similarly supported mass storage devices, could be connected to the system.
 
The [[RH10 MASSBUS controller]] (which appeared toward the end of the KI10 period), for MASSBUS mass storage devices, was similarly connected (to a DF10 channel, and the I/O bus). On the KL10, up to 8 [[RH20 MASSBUS controller]]s, which similarly supported mass storage devices, could be connected to the system.
  
−
[[Image:KIKLIOBusTerm.jpg|300px|left|thumb|KI10/KL10 I/O bus [[terminator]]]]
+
===Devices===
  
−
On machines with an I/O bus, other optional devices (the [[paper tape]] reader and punch, and console [[asynchronous serial line]], were standard), which connected to the I/O bus, included:
+
On machines with an I/O bus, other optional devices (the [[paper tape]] reader and punch, and console [[asynchronous serial line]], were generally standard), which connected to the I/O bus, included:
  
−
* TD10 [[DECtape]] Control - [[TU55]]
+
* [[TD10 DECtape Control]] - [[TU55 DECtape Transport|TU55]]
 
* BA10 Hardcopy Control - LP10 line [[printer]], XY10 [[plotter]], CR10 [[punched card|card]] reader, CP10 card punch
 
* BA10 Hardcopy Control - LP10 line [[printer]], XY10 [[plotter]], CR10 [[punched card|card]] reader, CP10 card punch
 
* DC10 asynchronous serial line controller
 
* DC10 asynchronous serial line controller
 
* DS10 [[synchronous serial line]] controller
 
* DS10 [[synchronous serial line]] controller
−
 
−
By the KL10 era, most low-speed peripherals were connected to [[front end]] computers, always DEC [[minicomputer]]s, which allowed the production of PDP-10 specific versions of all those devices to be dispensed with.
 
  
 
===Front ends===
 
===Front ends===
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The [[DA10 Twelve- and Eighteen-Bit Computer Interface]], which connected to the I/O bus, allowed a computer such as a [[PDP-8/I]] to exchange data with a PDP-10. The DC68A Data Communication System uses a DA10 to communicate with a PDP-8/I which has a DC08 Serial Line Multiplexer to interface with up to 128 asynchronous serial lines.
 
The [[DA10 Twelve- and Eighteen-Bit Computer Interface]], which connected to the I/O bus, allowed a computer such as a [[PDP-8/I]] to exchange data with a PDP-10. The DC68A Data Communication System uses a DA10 to communicate with a PDP-8/I which has a DC08 Serial Line Multiplexer to interface with up to 128 asynchronous serial lines.
  
−
The [[DL10]], connected to both an external memory bus and the I/O bus, allowed the PDP-10 CPU to control up to four [[PDP-11]]'s. The DC75 Synchronous Communication Multiplexer uses a DL10 to communicate with a [[PDP-11/20]] which has one or more DS11 Synchronous Line Interfaces to interface with 8 or more (depending on the configuration) [[synchronous serial line]]s.
+
The [[DL10 PDP-11 Data Link|DL10]], connected to both an external memory bus and the I/O bus, allowed the PDP-10 CPU to control up to four [[PDP-11]]'s. The DC75 Synchronous Communication Multiplexer uses a DL10 to communicate with a [[PDP-11/20]] which has one or more [[DS11 Multiple Line Synchronous Interface]]s to interface with 8 or more (depending on the configuration) [[synchronous serial line]]s.
  
 
On the KL10, up to 4 [[DTE20 Ten-Eleven Interface‎‎]]s, each of which allowed the connection of one PDP-11, could be attached. (One PDP-11, the 'master', a [[PDP-11/40]], would [[bootstrap]] the KL10, including loading the [[microcode]]; it could also be used for other 'normal' front end activities, such as driving groups of asynchronous serial lines, providing [[DECtape]]s, etc.)
 
On the KL10, up to 4 [[DTE20 Ten-Eleven Interface‎‎]]s, each of which allowed the connection of one PDP-11, could be attached. (One PDP-11, the 'master', a [[PDP-11/40]], would [[bootstrap]] the KL10, including loading the [[microcode]]; it could also be used for other 'normal' front end activities, such as driving groups of asynchronous serial lines, providing [[DECtape]]s, etc.)
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==Software==
 
==Software==
  
−
The first three generations of PDP-10's were marketed as the [[DECsystem-10]], running the [[TOPS-10]] [[operating system]]; the third was also sold as the [[DECSYSTEM-20]], running [[TOPS-20]]. (The varying capitalization was the result of a trademark infringment suit.)
+
The first three generations of PDP-10's were marketed as the [[DECsystem-10]], running the [[TOPS-10]] [[operating system]]; the third was also sold as the [[DECSYSTEM-20]], running [[TOPS-20]]. (The varying capitalization was allegedly the result of a trademark infringment suit.)
  
 
Two other very important operating systems also ran on PDP-10's: MIT's [[Incompatible Timesharing System|ITS]] (a very advanced system, from whence came [[EMACS]], and much more besides), and [[TENEX]], which DEC later turned into TOPS-20.
 
Two other very important operating systems also ran on PDP-10's: MIT's [[Incompatible Timesharing System|ITS]] (a very advanced system, from whence came [[EMACS]], and much more besides), and [[TENEX]], which DEC later turned into TOPS-20.
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* Jeff Parsons: [http://github.com/jeffpar/pcjs PCjs]
 
* Jeff Parsons: [http://github.com/jeffpar/pcjs PCjs]
 
* Mark Garrett: [http://github.com/gcsgithub/titan TITAN]
 
* Mark Garrett: [http://github.com/gcsgithub/titan TITAN]
 +
* Paul Nankervis: [https://github.com/paulnank/nankervis-pdp10-js nankervis-pdp10-js]
  
 
==See also==
 
==See also==
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* [http://bitsavers.org/pdf/dec/pdp10/ Bitsavers PDP-10 documents]
 
* [http://bitsavers.org/pdf/dec/pdp10/ Bitsavers PDP-10 documents]
 
** [http://www.bitsavers.org/pdf/dec/pdp10/KI10/DECsystem-10_Technical_Summary_1971.pdf DECsystem-10 Technical Summary]
 
** [http://www.bitsavers.org/pdf/dec/pdp10/KI10/DECsystem-10_Technical_Summary_1971.pdf DECsystem-10 Technical Summary]
−
** [http://www.bitsavers.org/pdf/dec/pdp10/KL10/EK-108OU-PD-002_KL10-Based_Physical_Description_Mar77.pdf EK-108OU-PD-002], "KL10-Based Physical Description" - has images of CJ dual card connectors and QuickLatch connectors, pp. 69-70
+
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/SB100-50-4-67%20PDP-10%20(150dpi).pdf PDP-10] - very early brochure
 +
* [https://archive.computerhistory.org/resources/access/text/2023/07/102737607-05-19-acc.pdf DECsystem-10 Technical Summary/DECSYSTEM-20 Technical Summary]
 +
* [http://bitsavers.org/www.computer.museum.uq.edu.au/pdf/DEC-10-XSRMA-A-D%20DECsystem10%20System%20Reference%20Manual.pdf decsystem-10 System Reference Manual] (DEC-10-XSRMA-A-D) - lengthy hardware documentation for programmers
 +
* [http://www.bitsavers.org/pdf/stanford/sail/SAILON-75A_DECsystem-1020_Hardware_Manual_DEC-10-XSRMA-D_Jan77.pdf DECsystem-10/20 Hardware Manual] - contains ''Extended Instruction Set'' supplement to the PDP-10 Hardware Reference Manual on pp. 242-327 of the PDF
 +
* [https://gordonbell.azurewebsites.net/CGB%20Files/Evolution%20of%20DECsystem%2010%20ACM%207801%20c.pdf The Evolution of the DECsystem 10] - [[CACM]] paper that covers the evolution from the PDP-6 through the KL10
 +
<!-- https://dl.acm.org/doi/pdf/10.1145/359327.359335 - another copy -->
 
* [https://www.ultimate.com/phil/pdp10/ Phil's PDP10 Miscellany Page] - an incredible collection of stuff
 
* [https://www.ultimate.com/phil/pdp10/ Phil's PDP10 Miscellany Page] - an incredible collection of stuff
 
** [https://www.ultimate.com/phil/pdp10/20yrs/index.html Twenty Years of 36-bit Computing with Digital 1964-1984]
 
** [https://www.ultimate.com/phil/pdp10/20yrs/index.html Twenty Years of 36-bit Computing with Digital 1964-1984]
 
** [https://www.ultimate.com/phil/pdp10/Fast-ACs Life in the Fast AC's] - amusing personal history of PDP-10's
 
** [https://www.ultimate.com/phil/pdp10/Fast-ACs Life in the Fast AC's] - amusing personal history of PDP-10's
 +
** [https://www.ultimate.com/phil/pdp10/10periphs 10periphs] - list of PDP-10 peripherals, other stuff
 
* [http://pdp10.nocrew.org nocrew's PDP-10 stuff]
 
* [http://pdp10.nocrew.org nocrew's PDP-10 stuff]
 
** [http://pdp10.nocrew.org/docs/pdp6-ka10.diffs.txt PDP-6/KA10 Differences]
 
** [http://pdp10.nocrew.org/docs/pdp6-ka10.diffs.txt PDP-6/KA10 Differences]
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* [https://sites.google.com/site/mthompsonorg/Home/pdp-10/pdp-10-serial-numbers PDP-10 Serial Numbers] - lists all still-extant PDP-10's
 
* [https://sites.google.com/site/mthompsonorg/Home/pdp-10/pdp-10-serial-numbers PDP-10 Serial Numbers] - lists all still-extant PDP-10's
 
* [http://www.inwap.com/pdp10/models.txt PDP-10 Models]
 
* [http://www.inwap.com/pdp10/models.txt PDP-10 Models]
 +
* [http://www.brouhaha.com/~eric/retrocomputing/pdp-10/models.html PDP-10 Model Information]
 
* [http://www.execulink.com/~dstalk/pdp-10_io.pdf PDP-10 I/O Structure]
 
* [http://www.execulink.com/~dstalk/pdp-10_io.pdf PDP-10 I/O Structure]
 +
* [https://engblg.livingcomputers.org/index.php/2020/04/17/the-xkl-toad-1-system/ The XKL Toad-1 System] - includes a decent history of the PDP-10
 
* [http://www.avanthar.com/healyzh/decemulation/pdp10emu.html The DEC PDP-10 Emulation Webpage]
 
* [http://www.avanthar.com/healyzh/decemulation/pdp10emu.html The DEC PDP-10 Emulation Webpage]
 +
* [https://www.theguardian.com/technology/article/2024/jun/06/reinventing-the-pdp-10 Rebuilding the world’s first gaming computer] - interesting article about the PiDP-10
  
 
[[Category: DEC Architectures]]
 
[[Category: DEC Architectures]]
−
[[Category: PDP-10 Systems]]
+
[[Category: PDP-10s]]
 
[[Category: DEC Mainframes]]
 
[[Category: DEC Mainframes]]
 +
[[Category: 36-bit Computers]]

Latest revision as of 03:38, 28 July 2024

A PDP-10 KL10 Model 1090

A series of large, 36-bit word mainframe-like systems built by DEC. They were basically a re-implementation of the earlier PDP-6 ISA, whose hardware engineering had been a failure. (The machines were so similar at the programming level that PDP-6 object code could run on a PDP-10.)

DEC sold 4 different generations of PDP-10 processors: the KA10, the KI10, the KL10, and the small KS10. All except the KS10 were available in multi-processor versions with two CPUs.

PDP-10s were very important machines on the early ARPANET and Internet, being one of the few (relatively!) cheaply available machines which could run a full NCP and later TCP/IP stack as a multi-user environment at the time.

They still have a large following today, due in part to the innovative time-sharing operating systems written for them (especially ITS). There are several good simulators available, notably SIMH and KLH10.

Hardware

Like most mainframes, PDP-10's were composed of a number of separate free-standing units of various types (CPUs, main memory, etc), connected together with busses carried in point-point cables. Systems could be upgraded by adding additional units, or replacing existing units with enhanced successors.

Busses

DEC-10's supported a number of different busses: there are different types of bus for main memory (the PDP-10 Memory Bus), and peripherals. On the KA10 and KI10 models, the PDP-10 I/O Bus was provided for the latter; it allowed peripherals to interrupt the CPU, and supported programmed I/O (including block transfers).

On the KL10, an optional DIA20 In/Out Bus Controller could also be attached, to provide a KA10/KI10 compatible I/O bus. However, by the KL10 era, most low-speed peripherals were connected to front end computers, always DEC minicomputers, which allowed the production of PDP-10-specific versions of all those devices to be dispensed with.

The KS10, which was sui generis, had its own custom memory bus, which appeared only on the main backplane. For I/O, it used the UNIBUS and (via RH11's) the MASSBUS.

Channels

For DMA, mass storage peripherals connected directly to memories (PDP-10 memories are generally multi-port).

In the KA10 and KI10, high-speed mass storage device controllers generally connected to both i) a channel, the DF10 Data Channel, which was attached to an external memory bus, and ii) the PDP-10 I/O Bus. The CPU controlled the channel via the device controller. This setup was used to connect mass storage controllers, such as:

The RH10 MASSBUS controller (which appeared toward the end of the KI10 period), for MASSBUS mass storage devices, was similarly connected (to a DF10 channel, and the I/O bus). On the KL10, up to 8 RH20 MASSBUS controllers, which similarly supported mass storage devices, could be connected to the system.

Devices

On machines with an I/O bus, other optional devices (the paper tape reader and punch, and console asynchronous serial line, were generally standard), which connected to the I/O bus, included:

Front ends

PDP-10's made use of front end computers from an early stage.

The DA10 Twelve- and Eighteen-Bit Computer Interface, which connected to the I/O bus, allowed a computer such as a PDP-8/I to exchange data with a PDP-10. The DC68A Data Communication System uses a DA10 to communicate with a PDP-8/I which has a DC08 Serial Line Multiplexer to interface with up to 128 asynchronous serial lines.

The DL10, connected to both an external memory bus and the I/O bus, allowed the PDP-10 CPU to control up to four PDP-11's. The DC75 Synchronous Communication Multiplexer uses a DL10 to communicate with a PDP-11/20 which has one or more DS11 Multiple Line Synchronous Interfaces to interface with 8 or more (depending on the configuration) synchronous serial lines.

On the KL10, up to 4 DTE20 Ten-Eleven Interface‎‎s, each of which allowed the connection of one PDP-11, could be attached. (One PDP-11, the 'master', a PDP-11/40, would bootstrap the KL10, including loading the microcode; it could also be used for other 'normal' front end activities, such as driving groups of asynchronous serial lines, providing DECtapes, etc.)

Software

The first three generations of PDP-10's were marketed as the DECsystem-10, running the TOPS-10 operating system; the third was also sold as the DECSYSTEM-20, running TOPS-20. (The varying capitalization was allegedly the result of a trademark infringment suit.)

Two other very important operating systems also ran on PDP-10's: MIT's ITS (a very advanced system, from whence came EMACS, and much more besides), and TENEX, which DEC later turned into TOPS-20. WAITS was created at SAIL and also ran at two other sites.

Others

PDP-10 ad

The 36-bit line was cancelled by DEC many times. In the beginning, the PDP-6 was difficult to manufacture and maintain, and only 23 were sold; it was cancelled not long after its introduction. However, it made a comeback as the PDP-10, which was a success. At the end, the PDP-10's uncertain future allowed a number of small vendors to sell PDP-10 'clones'.

Cancelled DEC projects

  • KXF10 "Dolphin", cancelled around 1978.
  • KT20 "Minnow", cancelled around 1979.
  • KC10 "Jupiter", cancelled 1983.
  • KD10

Clones

Two PDP-10 clones were built at Xerox PARC, since that was easier than trying to convince Xerox top management to allow the purchase of a relatively expensive machine from a direct competitor.

Commercial

  • Foonly: F-1, F2, F3, F4, F5 (unfinished)
  • Systems Concepts: SC-30M, SC-40
  • Tymshare: System 26, System 26KL.
  • CompuServe: JRG-1 (unfinished)
  • XKL: TOAD-1, TOAD-2

Hobbyist recreations

Software simulators

See also

Further reading

External links

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