Difference between revisions of "CD interconnect"

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In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.
 
In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.
  
'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as [[Private Memory Interconnect|PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes|Q/Q backplane]].which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.
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'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as [[Private Memory Interconnect|PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.
  
 
==Details==
 
==Details==

Revision as of 17:43, 9 February 2021

The CD interconnect (sometimes given as C/D interconnection, or some variant thereof) is the name given to the 'bus' which is present on the C and D connectors of a Q/CD backplane.

It is not actually a full bus (i.e. a given pin is not connected to 'all' instances of that pin, in every slot in the backplane); rather, slots are connected together in pairs, and these connections are used to connect together board pairs, without the need of a so-called 'over the back' connector cable.

In general (see below for details), the bottom (2, or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.

NOTE WELL: For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as PMI cards) do not avoid the QBUS pins on the CD connectors of a Q/Q backplane which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally destroy the card.

Details

The connection details are that for backplane slot 'N', in connector C, pins Cx2 are connected to the Cx1 pins in slot 'N+1', for x = B, D-S, and U-V. Similarly, in connector D, Dx2 is any slot is connected to Dx1 in the next slot, again for pins B, D-S, and U-V.

In addition, in slot 'N', in connector C, pin CA1 is connected to pin CC1 in slot 'N+1', and likewise in connector D, for DA1 to DC1. Finally, in slot 'N', pin CT2 is connected to pin DT2 in slot 'N+1'.

Finally, power (+5V) is available on pins CA2 and DA2), and ground on CC2, CT1, DC2 and DT1.

Backplanes

The DEC H9273-A backplane (used in the BA11-N mounting box) and H9276 backplane (used in the BA11-S mounting box) are both full Q/CD backplanes (i.e. every slot is a Q/CD slot); the former is Q18, and the latter Q22, although the former is easy to modify to Q22.

The DEC H9278-A backplane (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.

Use by PMI

The CD interconnect is used by Private Memory Interconnect cards, such as the KDJ11-B CPU, and the MSV11-J QBUS memory.

The connection is somewhat idiosyncratic, because it is desirable to be able to plug in a variable number of memory cards - i.e. create a true 'bus' by connecting together more than two slots. If the CPU card sent out the PMI bus on the bottom (2, or solder-side) pins, then the memory card would have to take the PMI bus in on its top (1, component-side) pins, and repeat the bus through on its bottom pins, for use by a notional 'next memory card'. However, if the next card is not a PMI memory card, this will result in the PMI bus being sent to a card which does not use it - possibly with harmful effects.

So, instead, PMI CPU cards emit the PMI bus on their top CD connector pins, and the memory cards take the bus in on their bottom pins, and repeat it through to their top pins. Thus, PMI memory cards must be placed in a Q/CD backplane above the CPU card.

An exception to this rule is the backplane in the PDP-11/84, in which the CD connectors of the QBUS section of the backplane are wired to form a true bus; in this machine, the PMI memory cards are placed below the processor card.