Difference between revisions of "DP11-A Synchronous Line Interface"
(→Implementation: verify form of two more) |
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|Additional Sync Register || DPASYNC || 774777 | |Additional Sync Register || DPASYNC || 774777 | ||
|- | |- | ||
| − | |Transmitter Control and Status Register || | + | |Transmitter Control and Status Register || DPXCSR || 774774 |
|- | |- | ||
| − | |Transmitter Buffer Register || | + | |Transmitter Buffer Register || DPXBUF || 774776 |
|} | |} | ||
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The [[address]]es shown are for the first DP11-A in a system; additional ones are normally set to be at 774760, 774750, etc to 774400. | The [[address]]es shown are for the first DP11-A in a system; additional ones are normally set to be at 774760, 774750, etc to 774400. | ||
| + | |||
| + | ===774770: Receiver Control and Status Register (DPRCSR)=== | ||
| + | |||
| + | {{16bit-header}} | ||
| + | | colspan=3 | Unused || CPAR || RACT || colspan=3 | BPCH || RDN || RDIE || colspan=2 | Unused || MRCV || MAINT || HLFD || STRS | ||
| + | {{16bitoctal-bitout}} | ||
| + | |||
| + | ===774774: Transmitter Control and Status Register (DPXCSR)=== | ||
| + | |||
| + | {{16bit-header}} | ||
| + | | CARRF || RXOF || RING || MRDY || CARR || CTS || RTS || Unused || XDN || XDIE || XSIE || Unused || MXMT || Unused || IDLS || TRDY | ||
| + | {{16bitoctal-bitout}} | ||
==Implementation== | ==Implementation== | ||
Revision as of 05:32, 1 February 2020
The DP11-A is the earliest synchronous serial line interface for the UNIBUS; it was double-buffered, and used programmed I/O (with separate receive and transmit interrupts) to transfer data, in either half-duplex or full-duplex, at baud rates up to 50K bits/second.
It was intended to interface to Bell 201, 301 and 303 series modems. The character length (6, 7 or 8 bits), and the sync character, were selectable under program control, as were idling (sending the sync character), as well as the modem control leads; the DP11-A could also be set to discard incoming sync characters.
Options allowed extending the character length to 10, 11 or 12 bits, and use of an internal clock.
It was constructed from a number of smaller FLIP CHIPs, along with a larger board, which were installed in a custom 4-slot backplane system unit. It used one of the DF11 Communications Line Adapters to interface to the modem.
Contents
Registers
| Register | Abbreviation | Address |
|---|---|---|
| Receiver Control and Status Register | DPRCSR | 774770 |
| Receiver Buffer Register | DPRBUF | 774772 |
| Sync Register | DPSYNC | 774773 |
| Additional Sync Register | DPASYNC | 774777 |
| Transmitter Control and Status Register | DPXCSR | 774774 |
| Transmitter Buffer Register | DPXBUF | 774776 |
The two SYNC registers seem to overlay the buffer registers; this is not yet sorted out.
The addresses shown are for the first DP11-A in a system; additional ones are normally set to be at 774760, 774750, etc to 774400.
774770: Receiver Control and Status Register (DPRCSR)
| Unused | CPAR | RACT | BPCH | RDN | RDIE | Unused | MRCV | MAINT | HLFD | STRS | |||||
| 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
774774: Transmitter Control and Status Register (DPXCSR)
| CARRF | RXOF | RING | MRDY | CARR | CTS | RTS | Unused | XDN | XDIE | XSIE | Unused | MXMT | Unused | IDLS | TRDY |
| 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 |
Implementation
The modules are:
- G8000 - +8V Filter
- M105 - UNIBUS Address Selector Module
- M239 - Divide by 16 Module (optional)
- M405 - Clock Module (optional)
- M594 - EIA Level Converter Module
- M7820 - Interrupt Control
- M7065 - Receiver Module (one mandatory, two optional)
- M7075 - Transmitter Module (ditto)
- M7223 - Control Module
The M7223 is a quad card; the others are all single. (Of those, the M105, M7820, M7065 and M7075 are extended length; the M239 and M405 are standard length.)
The M594 can be substituted with other adapter cards from the DF11 series; in particular, the M595 is used with the Bell 303 series modem.
Board locations (as seen from the board insertion side of the backplane, not the wire-wrap pin side, as is common in DEC documentation) are:
| Connector | ||||||
|---|---|---|---|---|---|---|
| Slot | A | B | C | D | E | F |
| 1 | UNIBUS In | M7223 | ||||
| 2 | G8000 Filter | M105 | M7820 | M405 | M239 | |
| 3 | Power | M7075 | M7065 | M7075 | M7065 | |
| 4 | UNIBUS Out | Modem connector | Level Converter | |||
Power comes in on a single-width stub card in the A3 slot (as is canonical in the PDP-11/20 generation of PDP-11s).
