Difference between revisions of "F-11 chip set"

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The '''F-11 chip set''' (code-named 'Fonz') was [[DEC]]'s second microprocessor implementation of the [[PDP-11 architecture]]. It was used in the [[KDF11 CPUs]].
 
The '''F-11 chip set''' (code-named 'Fonz') was [[DEC]]'s second microprocessor implementation of the [[PDP-11 architecture]]. It was used in the [[KDF11 CPUs]].
  
Unlike the first (the [[LSI-11]]), the set implemented the full PDP-11 architecture, including the the [[KTJ11-A memory management chip]] which implemented standard [[PDP-11 Memory Management]], and the [[KEF11-A floating point chip]] which implemented the [[FP11]]-compatible floating point. There is also a 6-chip carrier implementing the PDP-11 Commercial Instruction Set (CIS).
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The main CPU was implemented in two chips (carried on a single DIP carrier): the data paths chip (DC302, sometimes marked as '302x', where x is capital letter giving the revisions, DEC part # 21-15541-Ax), which contains the registers, ALU, etc; and the control chip (DC303, sometimes marked as '303x', DEC part # 23-001C7-Ax, although only the A revision has been seen), which contains microcode and a small amount of miscellaneous logic.
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Unlike the first microprocessor implementation (the [[LSI-11]]), the F-11 chip set implemented the full PDP-11 architecture, including the the [[KTJ11-A memory management chip]] which implemented standard [[PDP-11 Memory Management]], and the [[KEF11-A floating point chip]] which implemented the [[FP11]]-compatible floating point. There is also a 6-chip carrier implementing the PDP-11 Commercial Instruction Set (CIS).
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The KTJ11-A chip was the DC304, sometimes marked as '304x' (although only the E revision has been seen), DEC part # 21-15542-01,
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==External links==
 
==External links==

Revision as of 16:28, 9 October 2016

The F-11 chip set (code-named 'Fonz') was DEC's second microprocessor implementation of the PDP-11 architecture. It was used in the KDF11 CPUs.

The main CPU was implemented in two chips (carried on a single DIP carrier): the data paths chip (DC302, sometimes marked as '302x', where x is capital letter giving the revisions, DEC part # 21-15541-Ax), which contains the registers, ALU, etc; and the control chip (DC303, sometimes marked as '303x', DEC part # 23-001C7-Ax, although only the A revision has been seen), which contains microcode and a small amount of miscellaneous logic.

Unlike the first microprocessor implementation (the LSI-11), the F-11 chip set implemented the full PDP-11 architecture, including the the KTJ11-A memory management chip which implemented standard PDP-11 Memory Management, and the KEF11-A floating point chip which implemented the FP11-compatible floating point. There is also a 6-chip carrier implementing the PDP-11 Commercial Instruction Set (CIS).

The KTJ11-A chip was the DC304, sometimes marked as '304x' (although only the E revision has been seen), DEC part # 21-15542-01,


External links