Difference between revisions of "IMP11-A ARPANET interface"

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===772414: Transmit Command/Status Register (TXCSR)===
 
===772414: Transmit Command/Status Register (TXCSR)===
 
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| ERROR || NEX || ATTN || MAINT || colspan=3 | Unused || CYCLE || READY || IE || colspan=2 | XBA16-17 || Unused || LAST BIT || TX CLR || GO
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| ERR || NEX || ATTN || MAINT || colspan=3 | Unused || CYCLE || RDY || IE || colspan=2 | XBA16-17 || Unused || LAST BIT || TX CLR || GO
 
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===772434: Receive Command/Status Register (RXCSR)===
 
===772434: Receive Command/Status Register (RXCSR)===
 
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| ERROR || NEX || ATTN || MAINT || EOM || IMP NRDY || RDY ERR || CYCLE || READY || IE || colspan=2 | XBA16-17 || RX ENBL || HOST RDY || RX CLR || GO
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| ERR || NEX || ATTN || MAINT || EOM || IMP NRDY || RDY ERR || CYCLE || RDY || IE || colspan=2 | XBA16-17 || RX ENBL || HOST RDY || RX CLR || GO
 
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Revision as of 18:19, 30 November 2018

The IMP11-A ARPANET interface is a UNIBUS network interface produced by DEC's Computer Special System division to allow a machine to connect to an ARPANET IMP.

It consists of a BA11-E Mounting Box holding a pair of DR11-B parallel interfaces (one for packet input, and one for output), and a custom backplane holding a number of M-series FLIP CHIPs to interface to the IMP, including producing the bit serial input and output. Level converters allow use as either a Local Host or Distant Host interface.

Registers

Register Abbreviation Address
Transmit Word Count Register TXWCR 772410
Transmit Bus Address Register TXBAR 772412
Transmit Command/Status Register TXCSR 772414
Transmit Data Buffer Register TXDBR 772416
Receive Word Count Register RXWCR 772430
Receive Bus Address Register RXBAR 772432
Receive Command/Status Register RXCSR 772434
Receive Data Buffer Register RXDBR 772436

772410: Transmit Word Count Register (TXWCR)

WC15 <---> WC00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772412: Transmit Bus Address Register (TXBAR)

BA15 <---> BA00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772414: Transmit Command/Status Register (TXCSR)

ERR NEX ATTN MAINT Unused CYCLE RDY IE XBA16-17 Unused LAST BIT TX CLR GO
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772416: Transmit Data Buffer Register (TXDBR)

Data15 <---> Data00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772430: Receive Word Count Register (RXWCR)

WC15 <---> WC00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772432: Receive Bus Address Register (RXBAR)

BA15 <---> BA00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772434: Receive Command/Status Register (RXCSR)

ERR NEX ATTN MAINT EOM IMP NRDY RDY ERR CYCLE RDY IE XBA16-17 RX ENBL HOST RDY RX CLR GO
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

772436: Receive Data Buffer Register (RXDBR)

Data15 <---> Data00
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00