Difference between revisions of "KD11-E CPU"

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The '''KD11-E CPU''' was the first [[CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] boards, the M7265 Data Paths module and the M7266 Control module.
 
The '''KD11-E CPU''' was the first [[CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] boards, the M7265 Data Paths module and the M7266 Control module.
  
Although it supported the [[KY11-LB Programmer's Console]], including the maintainence functionality which allow the CPU's [[microcode]] to be [[single-stepping|single-stepped]], it did not support the [[FP11-A Floating-Point Processor|FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
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Although it supported the [[KY11-LB Programmer's Console]], including the maintainence functionality which allow the CPU's [[microcode]] to be [[single-stepping|single-stepped]], it did not support the [[FP11-A Floating-Point Processor|FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
  
 
==KY11-LB Interface==
 
==KY11-LB Interface==

Revision as of 17:54, 6 December 2017

The KD11-E CPU was the first CPU version for the PDP-11/34; it consisted of two hex boards, the M7265 Data Paths module and the M7266 Control module.

Although it supported the KY11-LB Programmer's Console, including the maintainence functionality which allow the CPU's microcode to be single-stepped, it did not support the FP11-A floating point unit or the KK11-A cache; a PDP-11/34 system needed the upgraded KD11-EA CPU for that.

KY11-LB Interface

The interface to the KY11-LB is carried over two 10-wire cables connected to Berg headers (denominated J1 and J2) on the M7266 module.