Difference between revisions of "KD11-E CPU"

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The '''KD11-E CPU''' was the first [[CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit board]]s, the M7265 Data Paths module and the M7266 Control module. They plugged into a modified [[Modified UNIBUS Device|MUD]] [[backplane]] which was customized for the KD11-E, the [[DD11-P backplane]].
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[[Image:KD11-E M7265.jpg|250px|right|thumb|M7265 Data Paths card]]
  
Although it supported the [[KY11-LB Programmer's Console]], including the maintainence functionality which allow the CPU's [[microcode]] to be [[single-step]]ped, it did not support the [[FP11-A Floating-Point Processor|FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
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The '''KD11-E CPU''' was the first [[Central Processing Unit|CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit board]]s, the M7265 Data Paths module and the M7266 Control module. They plugged into a modified [[Modified UNIBUS Device|MUD]] [[backplane]], the [[DD11-P backplane]], which was customized for the KD11-E.
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Although it supported the [[KY11-LB Programmer's Console]], including the [[diagnostic]] functionality which allow the CPU's [[microcode]] to be [[single-step]]ped, it did not support the [[FP11-A Floating-Point Processor|FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
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[[Image:KD11-E M7266.jpg|250px|right|thumb|M7266 Control card]]
  
 
==KY11-LB Interface==
 
==KY11-LB Interface==
  
The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s connected to [[Berg connector]] headers (denominated J1 and J2) on the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
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The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s with female [[Berg connector]]s connected to [[wire-wrap]] pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
  
 
==See also==
 
==See also==

Revision as of 13:45, 16 June 2020

M7265 Data Paths card

The KD11-E CPU was the first CPU version for the PDP-11/34; it consisted of two hex printed circuit boards, the M7265 Data Paths module and the M7266 Control module. They plugged into a modified MUD backplane, the DD11-P backplane, which was customized for the KD11-E.

Although it supported the KY11-LB Programmer's Console, including the diagnostic functionality which allow the CPU's microcode to be single-stepped, it did not support the FP11-A floating point unit or the KK11-A cache; a PDP-11/34 system needed the upgraded KD11-EA CPU for that.

M7266 Control card

KY11-LB Interface

The microcode diagnostic interface to the KY11-LB is carried over two 10-wire flat cables with female Berg connectors connected to wire-wrap pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)

See also