Difference between revisions of "KT11-C Memory Management Unit"

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The '''KT11-C Memory Management Unit''' is the [[memory management]] option for the [[PDP-11/45]]. It implements the full [[PDP-11 Memory Management]] architecture; in fact, the KT11-C is the archtype for PDP-11 memory management units.
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The '''KT11-C Memory Management Unit''' is the [[memory management]] option for the [[PDP-11/45]]. It implements the full [[PDP-11 Memory Management]] architecture; in fact, the KT11-C is the archetype for PDP-11 memory management units.
  
 
The KT11-C consists of two [[DEC card form factor|hex]] cards:
 
The KT11-C consists of two [[DEC card form factor|hex]] cards:
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==See also==
 
==See also==
  
* [[KT11-B Paging Option]]
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* [[KT11-D Memory Management Unit]]
  
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{{PDP-11}}
 
{{PDP-11}}
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[[Category: PDP-11 Processors]]

Revision as of 17:31, 11 April 2020

The KT11-C Memory Management Unit is the memory management option for the PDP-11/45. It implements the full PDP-11 Memory Management architecture; in fact, the KT11-C is the archetype for PDP-11 memory management units.

The KT11-C consists of two hex cards:

  • M8107 Segmentation Address Paths

and either:

  • M8108 Segmentation Status Registers

or:

  • M8108-YA Segmentation Status Registers

The M8108 board is found in the KB11-A CPU variant of the -11/45, and the M8108-YA in KB11-D CPU variant.

They both plug into pre-wired slots in the CPU backplane.

When the KT11-C is not present, the CPU must have an M8116 Segmentation Jumper Board present instead.

See also