Difference between revisions of "LSI-11"

From Computer History Wiki
Jump to: navigation, search
(Add more info on KEV11-C)
(+KUV11)
(26 intermediate revisions by 2 users not shown)
Line 1: Line 1:
The '''LSI-11''' was DEC's first cost-reduced [[PDP-11]] processor, using the [[QBUS]]. Several different LSI-11 models exist, including the KDF11-F (quad form factor), and the KD11-HA (dual form factor), also called the '''LSI-11/2'''.
+
[[Image:LSI-11.jpg|250px|thumb|right|M7264 KD11-F board (etch revision F), with KEV11-A]]
  
However, they all use the same chip set internally, the Western Digital WD16/CP1600 (alternative designations). The chip set consists of a data path chip, a control chip, and two or three [[microcode]] ROMs (each holding 512 words which are 22 bits wide). The uROMs all have the same pinout, and are wired in parallel, so they can be placed in any of the three uROM positions.
+
The '''LSI-11''' was DEC's first cost-reduced [[PDP-11]] [[Central Processing Unit|CPU]], introducing the [[QBUS]], and using the [[LSI-11 chip set]]. It was the first of the [[LSI-11 CPUs]]; it had the same QBUS limitations, and use of [[QBUS CPU ODT|ODT]] for control, as the others.
  
The first two uROMs contain the basic PDP-11 instruction set; the third uROM is optional, and a number of different choices are available. One is the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS.
+
The LSI-11 is a [[DEC card form factor|quad]] board (M7264) with additional functionality on-board. They were popular in [[Original Equipment Manufacturer|OEM]] usage.
  
The KEV11-C (see below for uROM information) provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]], sometimes known as DIS ([[DIBOL]] instruction set). It also apparently includes the EIS (but not the FIS). DIS came as a standard in some commercial-oriented LSI-11 systems; the KD11-P and KD11-Q processors (M7264-BB and M7264-YB, respectively) are CPU models with the KEV11-C installed. The DIS cannot be used with the FIS, not only because of the limited number of uROM slots, but also because the DIS and basic instruction set together use the entire uROM address space.
+
The usual CPU options were available for the LSI-11: the [[KEV11-A floating point|KEV11-A]], for the [[PDP-11 Extended Instruction Set|EIS]]/[[FIS floating point|FIS]] instructions; the [[KEV11-B Extended Instruction Set|KEV11-B]] provides EIS without FIS; the [[KEV11-C Commercial Instruction Set|KEV11-C]] provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but not the FIS). It also supported the optional [[KUV11 Writeable Control Store]].
  
==LSI-11==
+
The [[integrated circuit|chip]] order (from the left, with the contact finger edge down, and the component side facing the viewer) is [[KEV11]], μROM 1, μROM 0, Control, Data Path.
  
The LSI-11 is a quad board (M7264) with additional functionality on-board (making possible a single-board computer): the base KD11-F version includes 4KW of MOS RAM; the KD11-H version has the RAM deleted; the KD11-Q includes the KEV11-C.
+
==Variant models==
  
The chip order (from the left, with the contact finger edge down, and the component side facing the viewer) is KEV11, uROM 1, uROM 0, Control, Data Path.
+
Many different LSI-11 models exist, including the '''KD11-F''' and '''KD11-H''' base versions, and numerous other variants. The KD11-F version includes 4KW of [[Metal Oxide Semiconductor|MOS]] [[Random Access Memory|RAM]] on-board; the KD11-H version has the RAM deleted.
  
==LSI-11/2==
+
Others included various KEV11 chips pre-installed:
  
The LSI-11 is a dual board (M7270); it contains the processor, and nothing else.
+
* the KD11-L is a KD11-F with a KEV11-A
 +
* the KD11-N is a KD11-H with a KEV11-A
 +
* the KD11-P is a KD11-F with a KEV11-C
 +
* the KD11-Q is a KD11-H with a KEV11-C
  
Note that the image in the "Microcomputer Products Handbook" (pg. C-18) is erroneous; the order of the chips (from the handle end) is, in fact, KEV11, Control, uROM 1, uROM 0, Data Path (per the KD11-HA print set); the order given in the Handbook is that for the LSI-11 (no doubt an image was re-used without checking).
+
Some models include additional cards:
  
==Chip variants==
+
* the KD11-J is a KD11-H sold with an [[MMV11-A QBUS core memory]] card
 +
* the KD11-R is a KD11-H sold with an [[MSV11-C QBUS MOS memory]] card
  
There are a number of variants of all the various uROM chips; it is not known if all variants are completely interoperable (i.e. any revision of any chip can be replaced with any other, and have the machine still work), so combinations will be listed.
+
==See also==
  
Chip numbers of the form 23-xxxxx-rr, etc are DEC part numbers (where 'rr' seems to represent a revision number - 0, if not given); the corresponding Western Digital numbers are xxxxy, etc (where the 'x's are digits, and the 'y' a letter). The Data Path chip is a 1611H (various DEC part numbers), and the Control chip is a 2007C (ditto); the uROM chips are all 30xxy.
+
* [[LSI-11/2]]
  
The following sets (Data, Control, uROMs) have been observed (the first three on dual cards):
+
==External links==
  
* 1611H 21-11549-01, 2007C 23-002C4, 3010A 23-001B5, 3007D 23-002B5
+
* [http://web.frainresearch.org:8080/projects/pdp-11/lsi-11.php LSI-11 Processors]
* 1611H 21-16890, 2007C 23-002C4, 3010D 23-001B5, 3007D 23-007B5
 
* 1611H 21-16890, 2007C 23-003C4, 3010D 23-008B5, 3007D 23-007B5
 
* unknown, unknown, 3010D 23-001B5, 3007D 23-002B5
 
 
 
The 3010D contains uROM addresses 0x000-0x1ff, and the 3007D 23-002B5 contains 0x200-0x3ff.
 
 
 
For the KEV11-A, one version is a 3015 23-003B5 (seen with the first set above), which is suitable for the M7270 quad card etch revisions E and F, and the M7264 dual card. Another version is reported to be the 23-091A5, suitable for the M7270 quad card, etch revisions C and D.
 
 
 
For the KEV11-B, one version is known, the 23-090A5; it is suitable for the M7270 quad module etch revisions C and D.
 
 
 
The KEV11-C uses two uROMs, the 3025D 23-004B5 and 3026D (perhaps B?) 23-005B5. (There may also be a hybrid - i.e. single DIP carrier - version of the KEV11-C, but the part number is unknown.)
 
 
 
The version of the KEV11-C option with two uROMs obviously takes two uROM sockets; it is therefore used with a 40-pin hybrid (two chips on one carrier) which holds the two uROMs of the base instruction set. The hybrid is 23-001B6, 23-002B6, or 23-003B6 (for M7264 ECO 10, ECO 12, and ECO 16, respectively).
 
 
 
==Links==
 
 
 
* [https://github.com/brouhaha/cp16dis Microcode disassembler]
 
  
 
{{PDP-11}}
 
{{PDP-11}}
  
[[Category:QBUS processors]]
+
[[Category: PDP-11 Processors]]
 +
[[Category: QBUS Processors]]

Revision as of 02:51, 5 March 2020

M7264 KD11-F board (etch revision F), with KEV11-A

The LSI-11 was DEC's first cost-reduced PDP-11 CPU, introducing the QBUS, and using the LSI-11 chip set. It was the first of the LSI-11 CPUs; it had the same QBUS limitations, and use of ODT for control, as the others.

The LSI-11 is a quad board (M7264) with additional functionality on-board. They were popular in OEM usage.

The usual CPU options were available for the LSI-11: the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS). It also supported the optional KUV11 Writeable Control Store.

The chip order (from the left, with the contact finger edge down, and the component side facing the viewer) is KEV11, μROM 1, μROM 0, Control, Data Path.

Variant models

Many different LSI-11 models exist, including the KD11-F and KD11-H base versions, and numerous other variants. The KD11-F version includes 4KW of MOS RAM on-board; the KD11-H version has the RAM deleted.

Others included various KEV11 chips pre-installed:

  • the KD11-L is a KD11-F with a KEV11-A
  • the KD11-N is a KD11-H with a KEV11-A
  • the KD11-P is a KD11-F with a KEV11-C
  • the KD11-Q is a KD11-H with a KEV11-C

Some models include additional cards:

See also

External links