https://gunkies.org/w/index.php?title=MA20_core_memory&feed=atom&action=historyMA20 core memory - Revision history2024-03-28T10:35:26ZRevision history for this page on the wikiMediaWiki 1.30.0https://gunkies.org/w/index.php?title=MA20_core_memory&diff=30708&oldid=prevJnc: interleaving cleanup2023-08-01T02:17:13Z<p>interleaving cleanup</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 02:17, 1 August 2023</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l1" >Line 1:</td>
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<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]; it connected to the KL10's so-called internal memory bus, the [[PDP-10 Memory Bus|S-Bus]]. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[interleaving]]).</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]; it connected to the KL10's so-called internal memory bus, the [[PDP-10 Memory Bus|S-Bus]]. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[<ins class="diffchange diffchange-inline">memory interleaving|</ins>interleaving]]).</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>Controllers 0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>Controllers 0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MA20_core_memory&diff=27904&oldid=prevJnc: +link2022-10-23T01:23:57Z<p>+link</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 01:23, 23 October 2022</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l1" >Line 1:</td>
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<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]; it connected to the KL10's so-called internal memory bus, the S-Bus. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[interleaving]]).</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]; it connected to the KL10's so-called internal memory bus, the <ins class="diffchange diffchange-inline">[[PDP-10 Memory Bus|</ins>S-Bus<ins class="diffchange diffchange-inline">]]</ins>. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[interleaving]]).</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>Controllers 0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>Controllers 0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MA20_core_memory&diff=25642&oldid=prevJnc: cat caps2022-04-22T12:45:45Z<p>cat caps</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 12:45, 22 April 2022</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l11" >Line 11:</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [http://www.bitsavers.org/pdf/dec/pdp10/memory/MP00010_MA20_Schematic_Jul76.pdf MA20 Field Maintenance Print Set] (MP00010)</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [http://www.bitsavers.org/pdf/dec/pdp10/memory/MP00010_MA20_Schematic_Jul76.pdf MA20 Field Maintenance Print Set] (MP00010)</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 <del class="diffchange diffchange-inline">memories</del>]]</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 <ins class="diffchange diffchange-inline">Memories</ins>]]</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MA20_core_memory&diff=24324&oldid=prevJnc: /* External links */ +FMPS2021-10-17T10:46:06Z<p><span dir="auto"><span class="autocomment">External links: </span> +FMPS</span></p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 10:46, 17 October 2021</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l6" >Line 6:</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [[MB20 core memory]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [[MB20 core memory]]</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">==External links==</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">* [http://www.bitsavers.org/pdf/dec/pdp10/memory/MP00010_MA20_Schematic_Jul76.pdf MA20 Field Maintenance Print Set] (MP00010)</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td></tr>
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</table>Jnchttps://gunkies.org/w/index.php?title=MA20_core_memory&diff=23378&oldid=prevJnc: /* See also */ bah, typo2021-04-11T16:47:38Z<p><span dir="auto"><span class="autocomment">See also: </span> bah, typo</span></p>
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<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>* [[MB20 core memory]</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>* [[MB20 core memory<ins class="diffchange diffchange-inline">]</ins>]</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MA20_core_memory&diff=23377&oldid=prevJnc: /* See also */ +1; copyedit2021-04-11T16:47:11Z<p><span dir="auto"><span class="autocomment">See also: </span> +1; copyedit</span></p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 16:47, 11 April 2021</td>
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<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[interleaving]]).</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]<ins class="diffchange diffchange-inline">; it connected to the KL10's so-called internal memory bus, the S-Bus</ins>. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[interleaving]]).</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div><del class="diffchange diffchange-inline">It connected to the KL10's so-called internal memory bus, the S-Bus; controllers </del>0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins class="diffchange diffchange-inline">Controllers </ins>0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div> </div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins class="diffchange diffchange-inline">==See also==</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div> </div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins class="diffchange diffchange-inline">* [[MB20 core memory]</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MA20_core_memory&diff=23375&oldid=prevJnc: Found a desc of this one2021-04-11T04:07:07Z<p>Found a desc of this one</p>
<p><b>New page</b></p><div>The '''MA20''' was a [[core memory|core]] [[main memory]] system for the later [[PDP-10]]s, principally the mid-period [[KL10]]. An MA20 contained two memory controllers (numbered 0 and 1, or 2 and 3), each with up to four 16KW storage modules, for a maximum of 128KW; [[parity]] is provided to protect the memory contents. The [[access time]] is 1.00 µseconds, and the [[cycle time]] is 1.92 µseconds (both for the first [[word]] in a 4-word block, using four-way [[interleaving]]).<br />
<br />
It connected to the KL10's so-called internal memory bus, the S-Bus; controllers 0 and 1 are connected to S-Bus 0, and controllers 2 and 3 to S-Bus 1. For interleaving, each controller is configured as to which addresses (out of the 4 in an S-Bus block) it will respond to; both 2-way and 4-way interleaving require controllers to be set to 'odd' or 'even'. In 4-way interleaving, in addition to two controllers being actuated at the same time, each controller can start two modules reading at the same time.<br />
<br />
[[Category: PDP-10 memories]]</div>Jnc