https://gunkies.org/w/index.php?title=MH10_core_memory&feed=atom&action=historyMH10 core memory - Revision history2024-03-28T09:12:13ZRevision history for this page on the wikiMediaWiki 1.30.0https://gunkies.org/w/index.php?title=MH10_core_memory&diff=31824&oldid=prevJnc: Later CPU's use multiple ports to increase memory bandwidth2023-11-05T10:40:08Z<p>Later CPU's use multiple ports to increase memory bandwidth</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 10:40, 5 November 2023</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the [[KI10]] and early [[KL10]]s. An MH10 could contain up to four 64KW memory banks<sup>*</sup>, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20.  </div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the [[KI10]] and early [[KL10]]s. An MH10 could contain up to four 64KW memory banks<sup>*</sup>, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20.  </div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by <del class="diffchange diffchange-inline"> </del>[[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses <ins class="diffchange diffchange-inline">at least </ins>one port (in a [[multi-processor]] system, <ins class="diffchange diffchange-inline">at least </ins>one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called [[PDP-10 Memory Bus|external memory bus]] of the KA (18-bit address) or KI (22-bit address) form. Each port could be independently set to use 18- or 22-bit addresses, or to be disabled. Banks could also be independently enabled/disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called [[PDP-10 Memory Bus|external memory bus]] of the KA (18-bit address) or KI (22-bit address) form. Each port could be independently set to use 18- or 22-bit addresses, or to be disabled. Banks could also be independently enabled/disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td></tr>
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</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=30732&oldid=prevJnc: interleaving cleanup2023-08-02T11:57:12Z<p>interleaving cleanup</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">← Older revision</td>
<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 11:57, 2 August 2023</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l5" >Line 5:</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called [[PDP-10 Memory Bus|external memory bus]] of the KA (18-bit address) or KI (22-bit address) form. Each port could be independently set to use 18- or 22-bit addresses, or to be disabled. Banks could also be independently enabled/disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called [[PDP-10 Memory Bus|external memory bus]] of the KA (18-bit address) or KI (22-bit address) form. Each port could be independently set to use 18- or 22-bit addresses, or to be disabled. Banks could also be independently enabled/disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged (recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit), so that all even addresses are handled by controller 0, and odd by controller 1.</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[<ins class="diffchange diffchange-inline">memory interleaving|</ins>interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged (recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit), so that all even addresses are handled by controller 0, and odd by controller 1.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 shares components with the [[MM11-W core memory]] of the [[PDP-11]]: the G116 sense/inhibit and G236 XY Drive cards; and the H224-B core plane of the MG10 is a 19-bit version of the 18-/16-bit H224-C/D of the MM11-U.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 shares components with the [[MM11-W core memory]] of the [[PDP-11]]: the G116 sense/inhibit and G236 XY Drive cards; and the H224-B core plane of the MG10 is a 19-bit version of the 18-/16-bit H224-C/D of the MM11-U.</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=27931&oldid=prevJnc: +link2022-10-24T13:56:55Z<p>+link</p>
<table class="diff diff-contentalign-left" data-mw="interface">
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<td colspan="2" style="background-color: white; color:black; text-align: center;">← Older revision</td>
<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 13:56, 24 October 2022</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l3" >Line 3:</td>
<td colspan="2" class="diff-lineno">Line 3:</td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by  [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by  [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called external memory bus of the KA (18-bit address) or KI (22-bit address) form. Each port could be independently set to use 18- or 22-bit addresses, or to be disabled. Banks could also be independently enabled/disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called <ins class="diffchange diffchange-inline">[[PDP-10 Memory Bus|</ins>external memory bus<ins class="diffchange diffchange-inline">]] </ins>of the KA (18-bit address) or KI (22-bit address) form. Each port could be independently set to use 18- or 22-bit addresses, or to be disabled. Banks could also be independently enabled/disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged (recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit), so that all even addresses are handled by controller 0, and odd by controller 1.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged (recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit), so that all even addresses are handled by controller 0, and odd by controller 1.</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=25658&oldid=prevJnc: cat caps2022-04-23T11:27:25Z<p>cat caps</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 11:27, 23 April 2022</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l20" >Line 20:</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [http://www.bitsavers.org/pdf/dec/pdp10/memory/MP00178_MH10_Schematic_Aug76.pdf MH10 Field Maintenance Print Set] (MP00178)</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [http://www.bitsavers.org/pdf/dec/pdp10/memory/MP00178_MH10_Schematic_Aug76.pdf MH10 Field Maintenance Print Set] (MP00178)</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 <del class="diffchange diffchange-inline">memories</del>]]</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 <ins class="diffchange diffchange-inline">Memories</ins>]]</div></td></tr>
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</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=24431&oldid=prevJnc: boards shared with MM11-W2021-10-22T03:39:59Z<p>boards shared with MM11-W</p>
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<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 03:39, 22 October 2021</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l6" >Line 6:</td>
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<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged (recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit), so that all even addresses are handled by controller 0, and odd by controller 1.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged (recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit), so that all even addresses are handled by controller 0, and odd by controller 1.</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">The MH10 shares components with the [[MM11-W core memory]] of the [[PDP-11]]: the G116 sense/inhibit and G236 XY Drive cards; and the H224-B core plane of the MG10 is a 19-bit version of the 18-/16-bit H224-C/D of the MM11-U.</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><nowiki>*</nowiki> - <i>DEC documentation conflicts on this; the 'MH10 Maintenance Manual', EK-MH10-MM-003, August 1977, says optionally four 64KW banks (pg. 1-1) - and has generally been followed for this writeup; the 'DECsystem-10 DECSYSTEM-20 Processor Reference Manual', AA-H391A-TK, July 1980, says two 128KW banks (pg. G-18).</i></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><nowiki>*</nowiki> - <i>DEC documentation conflicts on this; the 'MH10 Maintenance Manual', EK-MH10-MM-003, August 1977, says optionally four 64KW banks (pg. 1-1) - and has generally been followed for this writeup; the 'DECsystem-10 DECSYSTEM-20 Processor Reference Manual', AA-H391A-TK, July 1980, says two 128KW banks (pg. G-18).</i></div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=24331&oldid=prevJnc: /* External links */ +Manual, FMPS2021-10-17T19:53:44Z<p><span dir="auto"><span class="autocomment">External links: </span> +Manual, FMPS</span></p>
<table class="diff diff-contentalign-left" data-mw="interface">
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<tr style="vertical-align: top;" lang="en">
<td colspan="2" style="background-color: white; color:black; text-align: center;">← Older revision</td>
<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 19:53, 17 October 2021</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l12" >Line 12:</td>
<td colspan="2" class="diff-lineno">Line 12:</td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [[MG10 core memory]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>* [[MG10 core memory]]</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">==External links==</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">* [http://www.bitsavers.org/pdf/dec/pdp10/memory/EK-MH10-MM-003_MH10_Maint_Aug77.pdf MH10 Maintenance Manual] (EK-MH10-MM-003)</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">* [http://www.bitsavers.org/pdf/dec/pdp10/memory/MP00178_MH10_Schematic_Aug76.pdf MH10 Field Maintenance Print Set] (MP00178)</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td></tr>
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</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=23465&oldid=prevJnc: big-endian numbering, 18/22 config, bank enable/dis2021-04-20T16:17:09Z<p>big-endian numbering, 18/22 config, bank enable/dis</p>
<table class="diff diff-contentalign-left" data-mw="interface">
<col class="diff-marker" />
<col class="diff-content" />
<col class="diff-marker" />
<col class="diff-content" />
<tr style="vertical-align: top;" lang="en">
<td colspan="2" style="background-color: white; color:black; text-align: center;">← Older revision</td>
<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 16:17, 20 April 2021</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l1" >Line 1:</td>
<td colspan="2" class="diff-lineno">Line 1:</td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the early [[KL10]]. An MH10 could contain up to four 64KW memory banks<sup>*</sup>, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20.  </div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the <ins class="diffchange diffchange-inline">[[KI10]] and </ins>early [[KL10]]<ins class="diffchange diffchange-inline">s</ins>. An MH10 could contain up to four 64KW memory banks<sup>*</sup>, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20.  </div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by  [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by  [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called external memory bus of the 18-or 22-bit address form. Each port <del class="diffchange diffchange-inline">on each module </del>could be independently set to use 18- or 22-bit addresses, or to be disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>It connected to the so-called external memory bus of the <ins class="diffchange diffchange-inline">KA (</ins>18-<ins class="diffchange diffchange-inline">bit address) </ins>or <ins class="diffchange diffchange-inline">KI (</ins>22-bit address<ins class="diffchange diffchange-inline">) </ins>form. Each port could be independently set to use 18- or 22-bit addresses, or to be <ins class="diffchange diffchange-inline">disabled. Banks could also be independently enabled/</ins>disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged, so that all even addresses are handled by controller 0, and odd by controller 1.</div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged <ins class="diffchange diffchange-inline">(recall that the PDP-10 uses [[big-endian]] numbering, so bit 35 is the low-order bit)</ins>, so that all even addresses are handled by controller 0, and odd by controller 1.</div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><nowiki>*</nowiki> - <i>DEC documentation conflicts on this; the 'MH10 Maintenance Manual', EK-MH10-MM-003, August 1977, says optionally four 64KW banks (pg. 1-1) - and has generally been followed for this writeup; the 'DECsystem-10 DECSYSTEM-20 Processor Reference Manual', AA-H391A-TK, July 1980, says two 128KW banks (pg. G-18).</i></div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div><nowiki>*</nowiki> - <i>DEC documentation conflicts on this; the 'MH10 Maintenance Manual', EK-MH10-MM-003, August 1977, says optionally four 64KW banks (pg. 1-1) - and has generally been followed for this writeup; the 'DECsystem-10 DECSYSTEM-20 Processor Reference Manual', AA-H391A-TK, July 1980, says two 128KW banks (pg. G-18).</i></div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=23412&oldid=prevJnc: typo; note doc clash2021-04-13T17:55:30Z<p>typo; note doc clash</p>
<table class="diff diff-contentalign-left" data-mw="interface">
<col class="diff-marker" />
<col class="diff-content" />
<col class="diff-marker" />
<col class="diff-content" />
<tr style="vertical-align: top;" lang="en">
<td colspan="2" style="background-color: white; color:black; text-align: center;">← Older revision</td>
<td colspan="2" style="background-color: white; color:black; text-align: center;">Revision as of 17:55, 13 April 2021</td>
</tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l1" >Line 1:</td>
<td colspan="2" class="diff-lineno">Line 1:</td></tr>
<tr><td class='diff-marker'>−</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the early [[KL10]]. An <del class="diffchange diffchange-inline">MG10 </del>could contain up to four 64KW memory banks, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20.  </div></td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the early [[KL10]]. An <ins class="diffchange diffchange-inline">MH10 </ins>could contain up to four 64KW memory banks<ins class="diffchange diffchange-inline"><sup>*</sup></ins>, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20.  </div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by  [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by  [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.</div></td></tr>
<tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l6" >Line 6:</td>
<td colspan="2" class="diff-lineno">Line 6:</td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged, so that all even addresses are handled by controller 0, and odd by controller 1.</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged, so that all even addresses are handled by controller 0, and odd by controller 1.</div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"><nowiki>*</nowiki> - <i>DEC documentation conflicts on this; the 'MH10 Maintenance Manual', EK-MH10-MM-003, August 1977, says optionally four 64KW banks (pg. 1-1) - and has generally been followed for this writeup; the 'DECsystem-10 DECSYSTEM-20 Processor Reference Manual', AA-H391A-TK, July 1980, says two 128KW banks (pg. G-18).</i></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">==See also==</ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;"></ins></div></td></tr>
<tr><td colspan="2"> </td><td class='diff-marker'>+</td><td style="color:black; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div><ins style="font-weight: bold; text-decoration: none;">* [[MG10 core memory]]</ins></div></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"></td></tr>
<tr><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td><td class='diff-marker'> </td><td style="background-color: #f9f9f9; color: #333333; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #e6e6e6; vertical-align: top; white-space: pre-wrap;"><div>[[Category: PDP-10 memories]]</div></td></tr>
</table>Jnchttps://gunkies.org/w/index.php?title=MH10_core_memory&diff=20805&oldid=prevJnc: Covers the basics2019-03-09T19:51:37Z<p>Covers the basics</p>
<p><b>New page</b></p><div>The '''MH10''' was a [[core memory|core]] [[main memory]] system for the [[PDP-10]]s, principally the early [[KL10]]. An MG10 could contain up to four 64KW memory banks, for a maximum of 256KW (only 1, 2 or 4 bank operation is supported, however). The [[access time]] is .74 µseconds, and the [[cycle time]] is 1.18 µseconds; [[parity]] is provided to protect the memory contents. An MH10 contains a pair of 'controllers', with the controller used for any particular cycle selected by [[address]] bit 20. <br />
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It was a [[multi-port memory]], with 8 ports per memory system: the [[Central Processing Unit|CPU]] uses one port (in a [[multi-processor]] system, one per CPU); the others are used by [[channel]]s (such as a [[DF10 Data Channel|DF10]]) for [[mass storage]] such as [[disk]]s.<br />
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It connected to the so-called external memory bus of the 18-or 22-bit address form. Each port on each module could be independently set to use 18- or 22-bit addresses, or to be disabled. The base address of an MH10 is switch-selectable; that address is used on all the ports, unlike the earlier [[PDP-10 memories]].<br />
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The MH10 supports two-way [[interleaving]] internally to an MH10, and four-way interleaving between a pair of MH10's (provided they are equally sized); any interleaving applies to all ports. For the two-way case, address bits 20 and 35 are exchanged, so that all even addresses are handled by controller 0, and odd by controller 1.<br />
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[[Category: PDP-10 memories]]</div>Jnc