Difference between revisions of "MM11-Y core memory"

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An MM11-Y was composed of two [[DEC card form factor‎|hex]] boards, one piggy-backed on the other, and the pair taking only a single [[backplane]] slot (electrically):
 
An MM11-Y was composed of two [[DEC card form factor‎|hex]] boards, one piggy-backed on the other, and the pair taking only a single [[backplane]] slot (electrically):
  
* An H228-B daughter-board containing the cores
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* An H228-B [[daughter-board]] containing the cores
 
* A G657 mother-board containing most of the electronics, and the contact fingers for plugging into a backplane
 
* A G657 mother-board containing most of the electronics, and the contact fingers for plugging into a backplane
  

Revision as of 17:53, 3 June 2022

The MM11-Y was a 64 Kbyte core main memory for PDP-11 UNIBUS machines. It provided parity, so its formal name was MM11-YP.

An MM11-Y was composed of two hex boards, one piggy-backed on the other, and the pair taking only a single backplane slot (electrically):

  • An H228-B daughter-board containing the cores
  • A G657 mother-board containing most of the electronics, and the contact fingers for plugging into a backplane

The MM11-Y did not use a custom backplane; it plugged into a standard MUD slot. The pair was 'thick' enough that a normal board cannot be plugged into the next slot; instead, a G727 grant continuity card must be used there (since it has no components on it, it just clears the H228-B card).

The core array provided two more bits per word, to support byte parity; parity operation used an M7850 parity controller plugged into the same backplane as the MM11-D.

It is possible to interleave a pair of MM11-Y's to provide reduced effective average access times.

Further reading

  • MM11-YP User's Manual (EK-MM1YP-UG) - not available online
  • MM11-YP Technical Manual (EK-MM1YP-TM-001) - not available online, exists in fiche

External links