Difference between revisions of "MM11-Y core memory"

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The core array provided two more bits per [[word]], to support [[byte]] parity; parity operation used an [[M7850  parity controller]] plugged into the same backplane as the MM11-D.
 
The core array provided two more bits per [[word]], to support [[byte]] parity; parity operation used an [[M7850  parity controller]] plugged into the same backplane as the MM11-D.
  
It is possible to [[interleave]] a pair of MM11-Y's to provide reduced effective average [[access time]]s.
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It is possible to [[memory interleaving|interleave]] a pair of MM11-Y's to provide reduced effective average [[access time]]s.
  
 
==Further reading==
 
==Further reading==
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* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MM11-YP%20G657%20M7850%2032K%20x%2018%20Core%20Memory/  MM11-YP Memory Module Field Maintenance Print Set] (MP-00317)
 
* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MM11-YP%20G657%20M7850%2032K%20x%2018%20Core%20Memory/  MM11-YP Memory Module Field Maintenance Print Set] (MP-00317)
 
{{PDP-11}}
 
  
 
[[Category: UNIBUS Memories]]
 
[[Category: UNIBUS Memories]]

Latest revision as of 23:47, 29 July 2023

The MM11-Y was a 64 Kbyte core main memory for PDP-11 UNIBUS machines. It provided parity, so its formal name was MM11-YP.

An MM11-Y was composed of two hex boards, one piggy-backed on the other, and the pair taking only a single backplane slot (electrically):

  • An H228-B daughter-board containing the cores
  • A G657 mother-board containing most of the electronics, and the contact fingers for plugging into a backplane

The MM11-Y did not use a custom backplane; it plugged into a standard MUD slot. The pair was 'thick' enough that a normal board cannot be plugged into the next slot; instead, a G727 grant continuity card must be used there (since it has no components on it, it just clears the H228-B card).

The core array provided two more bits per word, to support byte parity; parity operation used an M7850 parity controller plugged into the same backplane as the MM11-D.

It is possible to interleave a pair of MM11-Y's to provide reduced effective average access times.

Further reading

  • MM11-YP User's Manual (EK-MM1YP-UG) - not available online
  • MM11-YP Technical Manual (EK-MM1YP-TM-001) - not available online, exists in fiche

External links