Difference between revisions of "MOS Technology 6502"

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===Introduction===
 
The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for [[MOS Technology]] in 1975. When it was introduced, it was the least expensive full-featured CPU on the market by a considerable margin, costing less than one-sixth the price of competing designs from larger companies such as Motorola and Intel. It was nevertheless faster than most of them, and, along with the [[Zilog Z80]], sparked a series of computer projects that would eventually result in the home computer revolution of the 1980s.  
 
The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for [[MOS Technology]] in 1975. When it was introduced, it was the least expensive full-featured CPU on the market by a considerable margin, costing less than one-sixth the price of competing designs from larger companies such as Motorola and Intel. It was nevertheless faster than most of them, and, along with the [[Zilog Z80]], sparked a series of computer projects that would eventually result in the home computer revolution of the 1980s.  
  

Revision as of 17:57, 3 March 2013

Introduction

The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. When it was introduced, it was the least expensive full-featured CPU on the market by a considerable margin, costing less than one-sixth the price of competing designs from larger companies such as Motorola and Intel. It was nevertheless faster than most of them, and, along with the Zilog Z80, sparked a series of computer projects that would eventually result in the home computer revolution of the 1980s.

It was widely used in Apple, Atari and BBC computers, plus of course Commodore, the company which eventually bought out MOS Technology.

MOS 6502AD 4585 top.jpg

The original NMOS 6502 turned out to have unusually few bugs during the development cycle, unlike some competitors, but there were still a small number of quirks that occasionally created trouble. The most well-known one was probably the 'JMP ($xxFF)' bug. This is a jump to an indirect address, where the LSB of the destination address is in location $xxFF ('xx' can be whatever), and the MSB of the destination address is in location $xy00, where xy = xx+1. The bug is that in the case where the LSB byte is in the last address of a page (as indicated by the FF) the MSB is not read from the first byte of the next page but instead it's read from the first byte of the current page. So, if we have JMP ($05FF) the address should be composed of an LSB from $05FF and an MSB from $0600. Instead the MSB is read from $0500. This bug would be rare enough that a user may never be hit by it, particularly when using an assembler which knew about the bug and could detect a problematic address.

The CMOS version

This bug, and a couple of others, were removed when the processor was redesigned using CMOS instead of NMOS. The CMOS version was designed by Bill Mensch (one of the original designers of the 6800 and the NMOS 6502). It was licensed to many different companies for production, where some of them would use slightly different designs to fit their specific needs. The most well-known versions are the Rockwell 65C02 and Western Design Center (WDC) 65C02. Other variants were made by Synertek[1] and GTE (the GTE version worked well as a drop-in replacement for the NMOS 6502 even in older Apple II computers, although later Apple would use Rockwell 65C02 chips in the Apple IIe and IIc models). WDC continued to design other variants of the 65C02 and are still at it as of 2013. There were other manufacturers as well, including but not limited to NCR, California Micro Devices, and Ricoh. Ricoh made a variant for the Nintendo game system, this version missed the BCD instructions - presumably never needed for Nintendo games.

[1]Synertek and Rockwell were also second-source vendors of the NMOS 6502

Other variants of the 6502

MOS 6510

A 6502 with an 8-bit bi-directional I/O port which could be addressed at $00 (input) and $01 (output). However all 8 bits were only brought out to actual pins on the 6510-1 and 6510-2 variants, the 6510 only brought out the first 6 bits to pins.

The 6510 series also used a tri-state address bus, unlike the original NMOS 6502.

Current status of the 6502

WDC continues production and licensing of the 65C02 to this day, in 44-pin PLCC packages as well as the good old 40-pin DIP variant, but now it runs at up to 14MHz (conservatively. 20MHz is often achieavable). WDC also licenses 65C02 cores that run up to 200MHz. It's hard to believe, but the 65C02 (including cores) still sells in hundreds of million units per year as of 2012. There's probably one or more in your car, unless it's as old as my car. If you have an implanted heart defibrillator or a pacemaker then you probably (and certainly if it's a defibrillator) have a 65C02 inside your body, the only (AFAIK) processor so far approved for human body implants.

References