Difference between revisions of "PDP-11/05"

From Computer History Wiki
Jump to: navigation, search
(CPU board versions: Jumper locations)
(Split out KD11-B)
Line 1: Line 1:
[[Image:pdp11-05.jpg|150px|right|thumb|A PDP-11/05 from a sales brochure.]]
+
[[Image:pdp11-05.jpg|150px|left|thumb|A PDP-11/05 from a sales brochure.]]
  
 
{{Infobox Machine
 
{{Infobox Machine
Line 14: Line 14:
 
| caption = a PDP-11/05 from a sales brochure. -->
 
| caption = a PDP-11/05 from a sales brochure. -->
  
The '''PDP-11/05''' was the fourth processor in the [[PDP-11]] series, following the [[PDP-11/20]], the [[PDP-11/45]] and the [[PDP-11/40]]; it used the '''KD11-B''' CPU. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a [[UNIBUS]] machine.
+
The '''PDP-11/05''' was the fourth model in the [[PDP-11]] series, following the [[PDP-11/20]], the [[PDP-11/45]] and the [[PDP-11/40]]; it used the [[KD11-B CPU]]. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a [[UNIBUS]] machine.
  
The PDP-11/05 was identical to the [[PDP-11/10]]; the only difference between the /05 and the /10 was the number on the front panel. The /05 was aimed toward the [[OEM]] market, while the /10 was intended for end-users. General usage (following DEC's lead) is to refer to all these machines as '11/05s'.
+
The PDP-11/05 was identical to the [[PDP-11/10]]; the only difference between the /05 and the /10 was the number on the front panel. The /05 was aimed toward the [[OEM]] market, while the /10 was intended for end-users. General usage (following DEC's lead) is to refer to all these machines as '11/05's.
 
 
The KD11-B was a two-board [[micro-programming|micro-programmed]] processor contained on two [[DEC card form factor|hex]] cards.  
 
  
 
==Backplane versions==
 
==Backplane versions==
  
The PDP-11/05 and /10 came in three versions, with different main backplanes (the 9-slot unit holding the two CPU cards).
+
The PDP-11/05 and /10 came in three versions, with different main [[backplane]]s (the 9-slot unit holding the two [[Central Processing Unit|CPU]] cards).
  
 
The original /05 and /10 came with backplanes wired to hold [[MM11-L]] 16 Kbyte core memory units. There were two different backplanes: one held two memory units, with one slot left for [[Small Peripheral Controller|SPC]] devices; the other held one memory unit, and provided four SPC slots.
 
The original /05 and /10 came with backplanes wired to hold [[MM11-L]] 16 Kbyte core memory units. There were two different backplanes: one held two memory units, with one slot left for [[Small Peripheral Controller|SPC]] devices; the other held one memory unit, and provided four SPC slots.
Line 29: Line 27:
  
 
The later /05S and /10S came with a backplane wired to hold an [[MM11-U]] 32 Kbyte core memory, and which provided three SPC slots.
 
The later /05S and /10S came with a backplane wired to hold an [[MM11-U]] 32 Kbyte core memory, and which provided three SPC slots.
 
==CPU board versions==
 
 
The two boards in the PDP-11/05-10 (the M7260 data paths module, and the M7261 control logic module) both come in two markedly-different versions, but unlike later practise (as in, e.g. the [[PDP-11/34]]), the two versions are not given different M-numbers, or clearly marked with a revision (i.e. 'M7260' and 'M7260-AA') on the handles.
 
 
One easy way to visually distinguish the early M7260 from later ones is that the later ones contain a circular selector switch in the upper left corner to select the baud rate of the built-in serial line; also, the position of the large [[UART]] chip has a different location (from down near the contact fingers, to up near the handles) and orientation (parellel to the board's long axis, in the earlier revision). For the M7261, the early version of the board has a large blank area, containing only traces, in the left middle area of the board.
 
 
The early revision of the M7260 is the 'B' revision; the later is the 'C' revision (the latter is marked as such, on the back side of the board- "M7260C"). For the M7261, two early revisions are the 'C' and 'E' revisions (the latter also similarly marked - "M7261E"); the later is the 'F' (also marked).
 
 
The early version of the M7260 only supports 110 baud operation; the latter has a circular selector switch which allows operation at a range of speeds from 110 baud up to 2400 baud; however, it is necessary to tweak a trim pot to change from the 110/220/440/880/1760 speed set to the 150/300/600/1200/2400 set.
 
 
===Jumpers===
 
 
The later revision of the M7261 contains two jumpers which are not present on the earlier revision.
 
 
One (W1), when installed, disables the built-in serial line (which is 20mA, and limited to 2400 baud), allowing use of a more capable serial interface as the system console. The other (W2), when installed, disables the CPU from acting as a bus arbitrator, so that the machine can be a 'slave' processor, on a UNIBUS controlled by another CPU.
 
 
They are not labeled, which makes them impossible to find without external information. With the board component face up, and the contact fingers at the bottom, W1 is immediately to the right of E69, and W2 is immediately to the right of E73.
 
 
==Control PROMs==
 
 
The KD11-B makes extensive use of [[PROM]]s in place of random logic for control purposes; both boards contain a large number of PROMs,
 
in 32x8 and 256x4 formats.
 
 
The two types used on the M7260 are Intersil IM5600 32x8 PROM (IM5600C or equivalent; DEC also used MMI 6630C's, and Signetics N8223B's); and the 74187 256x4 PROM (DEC also used Intersil IM5603C's, and MMI 6108's and 4107's).
 
 
On the M7261, the IM5600 was used (DEC also used Signetics N82S23N's and N8223B's, and MMI 6330-1's), along with the Intersil IM5603 256x4 PROM (DEC also used Signetics 82S26N's [possibly a mis-print on the chip] and 82S126N's, MMI 6300-1's, 6300D's, 6111's and 6116's, and National DM74S387N's).
 
 
For the M7260 Data Paths board, the following table provides information on the PROMs on the early version (etch revision B) and late version (etch revision C). On the later version, the parts are all the same parts as the previous revision, but the chip numbering system for the board has been completely revised.
 
 
{| class="wikitable"
 
! Part # !! Type !! Rev. B !! Rev. C
 
|-
 
| A01A1 || 32x8 || E25 || E44
 
|-
 
| A02A1 || 32x8 || colspan="2" style="text-align:center;" | E53
 
|-
 
| A03A1 || 32x8 || E61 || E54
 
|-
 
| A03A2 || 256x4 || E59 || E72
 
|-
 
| A04A1 || 32x8 || E64 || E65
 
|-
 
| A05A1 || 32x8 || E66 || E59
 
|-
 
| A06A1 || 32x8 || E68 || E66
 
|-
 
| A08A1 || 32x8 || E69 || E78
 
|-
 
| A10A1 || 32x8 || E71 || E77
 
|-
 
| A11A1 || 32x8 || E74 || E83
 
|-
 
| A12A1 || 32x8 || E82 || E69
 
|}
 
 
For the M7261 Control Logic and Microprogram board, the following table provides information on the PROMs on the early version (etch revisions C and E) and late version (etch revision F). On the later version, the parts are mostly the same parts as the previous revision, but the chip numbering system for the board has been completely revised.
 
 
{| class="wikitable"
 
! Function !! Type !! Part # !! Rev. C !! Rev. E !! Rev. F
 
|-
 
| Bus Request -> Grant processing || 256x4 || A01A2 || colspan="2" style="text-align:center;" | E12 || E24
 
|-
 
| Internal address decode (first stage) || 256x4 || A02A2 || colspan="2" style="text-align:center;" | E30 || E53
 
|-
 
| Microprogram - Next instruction (high bits) || 256x4 || A04A2 || colspan="2" style="text-align:center;" | E92 || E102
 
|-
 
| Microprogram - Processor Status Word control || 256x4 || A05A2 || colspan="2" style="text-align:center;" | E93 || E104
 
|-
 
| Internal address decode (second stage) || 32x8 || A07A1 || colspan="2" style="text-align:center;" | E68 || E71
 
|-
 
| rowspan="2"|Microprogram - Bus control || rowspan="2"|256x4 || A07A2 || E95 || ||
 
|-
 
| A17A2 || || E95 || E106
 
|-
 
| Internal address decode (second stage) || 32x8 || A09A1 || colspan="2" style="text-align:center;" | E69 || E72
 
|-
 
| Branch utest service || 256x4 || A09A2 || colspan="2" style="text-align:center;" | E101 || E107
 
|-
 
| Microprogram - Next instruction (low bits) || 256x4 || A10A2 || colspan="2" style="text-align:center;" | E103 || E112
 
|-
 
| Microprogram - ALU operation select || 256x4 || A11A2 || colspan="2" style="text-align:center;" |E104 || E114
 
|-
 
| rowspan="2"|Microprogram - Branch utest || rowspan="2"|256x4 || A12A2 || colspan="2" style="text-align:center;" | E105 ||
 
|-
 
| A18A2 || colspan="2"| || E113
 
|-
 
| Internal interrupt acknowledge || 32x8 || A13A1 || colspan="2" style="text-align:center;" | E90 || <sup>''1''</sup>
 
|-
 
| Microprogram - Multiplexor control || 256x4 || A13A2 || colspan="2" style="text-align:center;" | E106 || E115
 
|-
 
| rowspan="2"|Console switch control || rowspan="2"|32x8 || A14A1 || E100 || || E108<sup>''2''</sup>
 
|-
 
| A16A1 || || E100<sup>''3''</sup> ||
 
|-
 
| rowspan="2"|Microprogram - Bus control || rowspan="2"|256x4 || A14A2 || colspan="2" style="text-align:center;" |  E107 ||
 
|-
 
| A19A2 || colspan="2"| || E116
 
|-
 
| rowspan="2"|Microprogram - ALU control || rowspan="2"|256x4 || A15A2 || colspan="2" style="text-align:center;" | E94 ||
 
|-
 
| A20A2 || colspan="2"| || E103
 
|-
 
| Microprogram - Miscellaneous || 256x4 || A16A2<sup>''4''</sup> || colspan="2" style="text-align:center;" | E96 || E105
 
|}
 
 
''Notes:''
 
 
1 - Note that the later version of this board (the 'F' etch revision) has one less PROM than the earlier; it was replaced by a 74154 4->16 demultiplexor (at E110).
 
 
2 - The later version of the board appears to have reverted to an A14A1 (both the parts list, and drawing, show an A14A1); the reason is unknown.
 
 
3 - For the 'E' etch revision, the actual drawing shows an A14A1 at location E100, not an A16A1, but the latter one is in the parts list.
 
 
4 - It appears that on an earlier revision of the prints, the chip in E96 (A16A2 in the C etch revision) was actually a different version, A8A2; the prints for the 'C' etch revision show the first one in the parts list, but the latter one in the actual drawing.
 
 
==Prints==
 
 
Prints for both major versions of the CPU cards are available online; the earlier ones may be found in the [[GT40]] Engineering Drawings set dated February, 1973 (pp. 141-150 for the M7260, and pp. 162-173 for the M7261).
 
 
The following table contains details of exactly which board etch revisions are covered in which sets of prints (for both boards), and also the revision levels of the:
 
 
* Microprogram Flow
 
* Microprogram Symbolic Listing
 
* Microprogram Binary Listing
 
 
included in each print set:
 
 
{| class="wikitable"
 
! Drawing Set !! Date !! M7260 !! M7261 !! Flow !! Symbolic !! Binary
 
|-
 
| PDP-11/05 Engineering Drawings, Revision B (not online yet) || May, 1972 || B || C || B || B || B
 
|-
 
| GT40 Engineering Drawings || February, 1973 || B || E || B || C || C
 
|-
 
| PDP-11/05S System Engineering Drawings, Revision D || October, 1974 || C || F || C || E || E
 
|-
 
| PDP-11/05 Engineering Drawings, Revision AH || July, 1976 || C || F || C || E || E
 
|}
 
  
 
==Keys==
 
==Keys==
Line 179: Line 38:
  
 
{{PDP-11}}
 
{{PDP-11}}
 
[[Category:PDP-11 processors]]
 
[[Category:UNIBUS processors]]
 

Revision as of 15:41, 12 February 2018

A PDP-11/05 from a sales brochure.


PDP-11/05
Manufacturer: Digital Equipment Corporation
Architecture: PDP-11
Year Introduced: June 1972
Word Size: 16 bit
Physical Address Size: 18 bit (only 16 bits usable)
Bus Architecture: UNIBUS


The PDP-11/05 was the fourth model in the PDP-11 series, following the PDP-11/20, the PDP-11/45 and the PDP-11/40; it used the KD11-B CPU. It was intended as a cost-reduced low-end machine to replace the PDP-11/20. Like all the other early PDP-11's, it was a UNIBUS machine.

The PDP-11/05 was identical to the PDP-11/10; the only difference between the /05 and the /10 was the number on the front panel. The /05 was aimed toward the OEM market, while the /10 was intended for end-users. General usage (following DEC's lead) is to refer to all these machines as '11/05's.

Backplane versions

The PDP-11/05 and /10 came in three versions, with different main backplanes (the 9-slot unit holding the two CPU cards).

The original /05 and /10 came with backplanes wired to hold MM11-L 16 Kbyte core memory units. There were two different backplanes: one held two memory units, with one slot left for SPC devices; the other held one memory unit, and provided four SPC slots.

A second version, the /05N and /10N, came in a 10-1/2 inch box and had a slightly different backplane, which had space for two MM11-L memory units, but deleted the SPC slot of the previous double MM11-L backplane, and replaced it with a slot to hold the dual-height M9970 console terminal cable board.

The later /05S and /10S came with a backplane wired to hold an MM11-U 32 Kbyte core memory, and which provided three SPC slots.

Keys

Unlike all the other keyed PDP-11s, which use a circular Ace key, the /05's (and /10s) use a normal flat Yale-type key. The original key is a Chicago Lock Company key, code "GRB 2"; this is cut 215, on a Chicago K5K or Ilco S1041T blank. If simply duplicating an existing key, Hillman Y11 and FR4 blanks may be used (both work, but one has to be trimmed a bit, length-wise).

Gallery

PDP1105.jpg 1105.jpg