Difference between revisions of "PDP-11/24"

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(Turn into real page; give details of busses and UNIBUS map)
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[[Image:pdp11-24.jpg|thumb|right|200px|PDP-11/24]]
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The '''PDP-11/24''' was the last low-end [[UNIBUS]] [[PDP-11]] system. The KDF11-UA CPU of the -11/24 was also implemented as a single [[DEC card form factor|hex]] card, the M7133; it used the same 'Fonz' chip-set as the [[QBUS]] [[PDP-11/23]].
  
1979: LSI-11/23 (F11)- second LSI design, first with floating point (also [[PDP-11/23]], [[PDP-11/24]], [[Pro 350]])
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Like the earlier [[PDP-11/44]], the -11/24 supported up to 4 Mbytes of main memory, using an [[Extended UNIBUS]] between the CPU and memory; all devices were attached to a semi-separate (see below) [[UNIBUS]]. An optional UNIBUS MMap provided access to all of memory for UNIBUS DMA devices.
  
[http://replay.web.archive.org/20031019171636/http://hampage.hu/pdp-11/1123.html hampage.hu] has this close enough to the [[PDP-11/23]].
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==UNIBUS Map==
  
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The optional UNIBUS Map, the [[KT24]], provided a path between the UNIBUS and the EUB; the KT24 was also implemented as a single hex card, the M7134.
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A set of 31 mapping register pairs in the KT24 mapped 8 Kbyte blocks of UNIBUS address space to any location within the 4 Mbyte main memory address space.
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If no KT24 was present, the CPU detected its absence, and statically mapped the UNIBUS address space across to the low 256 Kbytes of EUB main memory, using a cross-connection path on the CPU card.
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==System bus structure==
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As mentioned, the -11/24 used an EUB for the bus between the memory and the CPU, and the UNIBUS for the bus between the CPU and devices. The two busses were not entirely separated; they shared a set of data lines, with each bus having a separate set of address lines.
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Either the CPU, or the optional KT24, provided a path from the UNIBUS to the EUB for DMA access to main memory by devices.
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The top 256 Kbtes of the CPU's address space were devoted to the UNIBUS; the top 8 Kbytes of that were, as usual, the I/O space.
  
 
{{PDP-11}}
 
{{PDP-11}}
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[[Category:UNIBUS processors]]
 
[[Category:UNIBUS processors]]

Revision as of 04:41, 23 July 2016

The PDP-11/24 was the last low-end UNIBUS PDP-11 system. The KDF11-UA CPU of the -11/24 was also implemented as a single hex card, the M7133; it used the same 'Fonz' chip-set as the QBUS PDP-11/23.

Like the earlier PDP-11/44, the -11/24 supported up to 4 Mbytes of main memory, using an Extended UNIBUS between the CPU and memory; all devices were attached to a semi-separate (see below) UNIBUS. An optional UNIBUS MMap provided access to all of memory for UNIBUS DMA devices.

UNIBUS Map

The optional UNIBUS Map, the KT24, provided a path between the UNIBUS and the EUB; the KT24 was also implemented as a single hex card, the M7134.

A set of 31 mapping register pairs in the KT24 mapped 8 Kbyte blocks of UNIBUS address space to any location within the 4 Mbyte main memory address space.

If no KT24 was present, the CPU detected its absence, and statically mapped the UNIBUS address space across to the low 256 Kbytes of EUB main memory, using a cross-connection path on the CPU card.

System bus structure

As mentioned, the -11/24 used an EUB for the bus between the memory and the CPU, and the UNIBUS for the bus between the CPU and devices. The two busses were not entirely separated; they shared a set of data lines, with each bus having a separate set of address lines.

Either the CPU, or the optional KT24, provided a path from the UNIBUS to the EUB for DMA access to main memory by devices.

The top 256 Kbtes of the CPU's address space were devoted to the UNIBUS; the top 8 Kbytes of that were, as usual, the I/O space.