Difference between revisions of "PDP-11/84"

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The '''PDP-11/84''' is the [[UNIBUS]]-capable twin to the [[QBUS]]-only [[PDP-11/83]]. Both used the [[KDJ11-B]] CPU; the -11/84 added a [[KTJ11-B]] QBUS->UNIBUS adapter to provide its UNIBUS, and had a backplane which was half QBUS, and half UNIBUS.
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The '''PDP-11/84''' is the [[UNIBUS]]-capable twin to the [[QBUS]]-only [[PDP-11/83]]. Both used the [[KDJ11-B]] CPU (with its [[Private Memory Interconnect bus]]); the -11/84 added a [[KTJ11-B]] QBUS->UNIBUS adapter to provide its UNIBUS, and had a backplane which was half QBUS, and half UNIBUS.
  
 
== hampage.hu ==
 
== hampage.hu ==

Revision as of 17:24, 5 June 2016

The PDP-11/84 is the UNIBUS-capable twin to the QBUS-only PDP-11/83. Both used the KDJ11-B CPU (with its Private Memory Interconnect bus); the -11/84 added a KTJ11-B QBUS->UNIBUS adapter to provide its UNIBUS, and had a backplane which was half QBUS, and half UNIBUS.

hampage.hu

PDP-11/84

Quoting: Introduced in 1988. Based on the J-11 chip, DEC originally wanted the clock speed to be 20MHz, but it couldn't be done on time, so the actual speed was 18MHz. It was the fastest CPU of the PDP-11's anyhow. The high-end configuration had up to 4MB RAM on PMI (Private Memory Interconnect) and a floating-point accelerator.

The UNIBUS-based PDP-11/84 was for those customers, who wanted more I/O throughput or had some legacy equipment.

The box on the picture to the left is a BA123 which was a popular enclosure for qbus machines. Apart from the 12x4-slot qbus backplane, it had five slots for storage units, e.g. room for two or three harddisks, a tape drive (TK50 here) and floppy.

Gallery

A PDP-11/83 A PDP-11/84