Difference between revisions of "PDP-8/E"
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| image = PDP 8 e Trondheim.jpg | | image = PDP 8 e Trondheim.jpg | ||
| caption = PDP-8/E front panel | | caption = PDP-8/E front panel | ||
| + | | manufacturer = [[Digital Equipment Corporation|DEC]] | ||
| + | | architecture = [[PDP-8 architecture|PDP-8]] | ||
| + | | year introduced = 1970 | ||
| + | | form factor = [[minicomputer]] | ||
| + | | word size = 12 | ||
| + | | physical address = 32KW (requires optional KM8-E) | ||
| + | | virtual address = 4KW | ||
| + | | logic type = [[Transistor-transistor logic|TTL]] | ||
| + | | design type = [[clock]]ed random [[logic]] | ||
| + | | clock speed = 385KHz | ||
| + | <!-- | ||
| ram = Maximum of 32 kwords in eight 4 kword banks | | ram = Maximum of 32 kwords in eight 4 kword banks | ||
| − | | | + | --> |
| + | | memory speed = 1.2 μseconds | ||
| + | | bus arch = [[OMNIBUS]] | ||
| + | | memory mgmt = bank selection, CPU mode | ||
| + | | operating system = [[OS/8]], [[TSS/8]] | ||
| + | | predecessor = [[PDP-8/I]] | ||
| + | | successor = [[PDP-8/A]] | ||
| + | | price = US$5K (CPU and 4KW memory) | ||
}} | }} | ||
| − | + | The '''PDP-8/E''' was an improved model in the [[PDP-8 family|PDP-8 line]], and introduced the [[OMNIBUS]] for interfacing to [[device controller]]s. | |
| + | |||
| + | The '''PDP-8/F''' was a cost-reduced version of the -8/E with the same [[Central Processing Unit|CPU]] and [[core memory|core]] [[main memory]], but only a single OMNIBUS [[backplane]]. The '''PDP-8/M''' is the [[Original Equipment Manufacturer|OEM]] version of the PDP-8/F. | ||
| + | |||
| + | The -8/E's KK8-E [[Central Processing Unit|CPU]] consists of five [[DEC card form factor|quad]] boards; the MM8-E core memory that was standard on the -8/E consisted of sets of three quad boards. | ||
| + | |||
| + | Options included: | ||
| + | |||
| + | * KA8-E Positive I/O Bus Interface, to allow use of older PDP-8 devices | ||
| + | * KM8-E Memory Extension and Time-Share Option, which was needed to support more than 4K [[word]]s of memory, and allowed the computer to operate in either Executive Mode or User Mode | ||
| + | * MP8-E Memory Parity | ||
| + | * KD8-E [[OMNIBUS|Data Break]] Interface | ||
| + | * KE8-E Extended Arithmetic Element, which supported [[hardware]] integer multiplication and division, one-[[bit]] double-word shifts, and [[normalization]] | ||
| + | * FPP12-P and FPP12-AP [[Floating point processor|Floating Point Processor]] (24+12 bits) | ||
| + | * FPP12-AE Double Precision option (FPP12-AP only, 60+12 bits) | ||
| + | |||
| + | It could perform an addition to the [[accumulator]] in 2.6 μseconds, and a 12 by 12 bit multiplication with 24 bit result in 40 μseconds, using the math extension hardware. | ||
| + | |||
| + | The -8/M could be supplied with either a KC8-M Operator's Console, or a KC8-ML Programmer's Console, the latter being basically identical to the KC8-EA Programmer's Console of the basic -8/E. | ||
| + | |||
| + | ==External links== | ||
| + | |||
| + | * [https://ethw.org/First-Hand:PDP-8/E_OMNIBUS_Ride First-Hand:PDP-8/E OMNIBUS Ride] - PDP-8/E Design Story | ||
{{Nav PDP-8}} | {{Nav PDP-8}} | ||
| + | |||
| + | [[Category: PDP-8s]] | ||
Revision as of 14:21, 7 April 2019
| PDP-8/E | |
 PDP-8/E front panel | |
| Manufacturer: | DEC |
|---|---|
| Architecture: | PDP-8 |
| Year Introduced: | 1970 |
| Form Factor: | minicomputer |
| Word Size: | 12 |
| Logic Type: | TTL |
| Design Type: | clocked random logic |
| Clock Speed: | 385KHz |
| Memory Speed: | 1.2 μseconds |
| Physical Address Size: | 32KW (requires optional KM8-E) |
| Virtual Address Size: | 4KW |
| Memory Management: | bank selection, CPU mode |
| Bus Architecture: | OMNIBUS |
| Operating System: | OS/8, TSS/8 |
| Predecessor(s): | PDP-8/I |
| Successor(s): | PDP-8/A |
| Price: | US$5K (CPU and 4KW memory) |
The PDP-8/E was an improved model in the PDP-8 line, and introduced the OMNIBUS for interfacing to device controllers.
The PDP-8/F was a cost-reduced version of the -8/E with the same CPU and core main memory, but only a single OMNIBUS backplane. The PDP-8/M is the OEM version of the PDP-8/F.
The -8/E's KK8-E CPU consists of five quad boards; the MM8-E core memory that was standard on the -8/E consisted of sets of three quad boards.
Options included:
- KA8-E Positive I/O Bus Interface, to allow use of older PDP-8 devices
- KM8-E Memory Extension and Time-Share Option, which was needed to support more than 4K words of memory, and allowed the computer to operate in either Executive Mode or User Mode
- MP8-E Memory Parity
- KD8-E Data Break Interface
- KE8-E Extended Arithmetic Element, which supported hardware integer multiplication and division, one-bit double-word shifts, and normalization
- FPP12-P and FPP12-AP Floating Point Processor (24+12 bits)
- FPP12-AE Double Precision option (FPP12-AP only, 60+12 bits)
It could perform an addition to the accumulator in 2.6 μseconds, and a 12 by 12 bit multiplication with 24 bit result in 40 μseconds, using the math extension hardware.
The -8/M could be supplied with either a KC8-M Operator's Console, or a KC8-ML Programmer's Console, the latter being basically identical to the KC8-EA Programmer's Console of the basic -8/E.
External links
- First-Hand:PDP-8/E OMNIBUS Ride - PDP-8/E Design Story
| v • d • e PDP-8 Computers, Software and Peripherals |
|---|
| PDP-8s: PDP-5 • PDP-8 • LINC-8 • PDP-8/S • PDP-8/I • PDP-8/L • PDP-12 • PDP-8/E • PDP-8/F • PDP-8/M • PDP-8/A
Workstations: VT78 Also: PDP-8 family • PDP-8 architecture • PDP-8 Memory Extension units |
