Difference between revisions of "TA11 Magnetic Tape Cassette controller"

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The '''TA11 Magnetic Tape Cassette controller''' is the [[UNIBUS]] controller for the '''TA11 Magnetic Tape Cassette System''', which includes a controller and a [[TU60 Dual DECasette Transport]], which uses Phillips-type tape cassettes holding a specially formulated tape.
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The '''TA11 Magnetic Tape Cassette controller''' is the [[UNIBUS]] [[device controller]] for the '''TA11 Magnetic Tape Cassette System''', which includes a controller and a [[TU60 Dual DECasette Transport]], which uses Phillips-type tape cassettes holding a specially formulated tape.
  
The TA11 itself is a [[DEC card form factor|quad]] board, the M7892, which plugs into an [[Small Peripheral Controller|SPC]] slot; a pair of [[BC08-S]] [[flat cables]] which connect the board and drive. All data transfer is via [[programmed I/O]], one byte at a time.
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The TA11 itself is a [[DEC card form factor|quad]] board, the M7892, which plugs into an [[Small Peripheral Controller|SPC]] slot; a pair of [[BC08-S]] [[flat cable]]s connect the board and drive. All data transfer is via [[programmed I/O]], one byte at a time.
  
 
==Device registers==
 
==Device registers==
  
The TA11 has but two registers, a 'Control and Status' register and a 'Data Buffer' register.
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The TA11 has but two [[register]]s, a 'Control and Status' register and a 'Data Buffer' register.
  
 
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[[Category: UNIBUS Storage Controllers]]

Revision as of 13:38, 24 April 2019

The TA11 Magnetic Tape Cassette controller is the UNIBUS device controller for the TA11 Magnetic Tape Cassette System, which includes a controller and a TU60 Dual DECasette Transport, which uses Phillips-type tape cassettes holding a specially formulated tape.

The TA11 itself is a quad board, the M7892, which plugs into an SPC slot; a pair of BC08-S flat cables connect the board and drive. All data transfer is via programmed I/O, one byte at a time.

Device registers

The TA11 has but two registers, a 'Control and Status' register and a 'Data Buffer' register.

Register Abbreviation Address
Control and Status Register TACS 777500
Data Buffer Register TADB 777502

777500: Control and Status Register (TACS)

Error Block Check Clear Leader Write Lock File Gap Timing Error Off Line Unit Select Transfer Request Interrupt Enable Ready Last Byte Function Go
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

The functions are:

Code Function Abbreviation
0 Write File Gap WFG
1 Write WRITE
2 Read READ
3 Space Reverse File SRF
4 Space Reverse Block SRB
5 Space Forward File SFF
6 Space Forward Block SFB
7 Rewind REWIND

777502: Data Buffer Register (TADB)

Unused Data
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00