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• UNIBUS Device Addresses
  ...k is specifically called out that way in a [[Digital Equipment Corporation|DEC]] document (source indicated). CPU [[memory management]] registers marked with "%" do not exist in CPUs with the [[PDP-11 Memory Management#Simplified subset|'11/40' type memory m
  7 KB (927 words) - 11:26, 12 November 2021
• UNIBUS and QBUS termination
  ...s necessary, but can be provided anywhere on the bus; most [[UNIBUS]]/QBUS CPUs do so, with the notable exception of the [[KD11-D CPU|KD11-D]] of the [[PDP ...). However, most PDP-11 CPUs (including all QBUS CPUs, such as the [[KDF11 CPUs]]) have it, and will time out unused grants. (This takes somewhat longer th
  7 KB (1,202 words) - 14:32, 28 November 2023
• KDJ11-D CPU
  ...g the [[J-11 chip set]] of the [[PDP-11]] of the [[KDJ11 CPUs]]. It is a [[DEC card form factor|quad-height]] board, the '''M7554'''; it is available in t * [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1D-UG_KDJ11-D_May87.pdf KDJ11-D/S CPU Module User's Guide]
  3 KB (529 words) - 12:01, 15 August 2022
• M9302 UNIBUS terminator
  ...is a [[DEC card form factor|dual]] format card, intended for use in the [[DEC edge connector contact identification|two top (AB) sections]] of a [[Modifi ...permanent assertion of SACK. (In many [[PDP-11]] [[Central Processing Unit|CPUs]], that will [[KY11-L to CPU interface|freeze the CPU]].)
  1 KB (229 words) - 22:33, 7 March 2023
• M8264 No-SACK Timeout Module
  ...out circuit]] which is not included in those two [[Central Processing Unit|CPUs]]. It was a [[DEC card form factor|quad]] format card, which plugged into any available [[Sma
  4 KB (740 words) - 16:41, 20 April 2022
• VAX-11/750 & VAX-11/751 Revision Control
  11/750 CPUs, beginning with Serial No. BTO3096, and 11/751 CPUs, Revision, MR (Module Revision) or PR (Part Revision). DEC Standard 012
  101 KB (10,182 words) - 14:04, 2 July 2022
• VAXcluster
  The HSC50, itself a cluster node, communicates with host cpus by way of the CI, using Digital’s MSCP (Mass Storage Control Protocol) fo DEC VAXclusters were introduced with VMS V3.0 in 1982.
  13 KB (1,908 words) - 19:25, 27 April 2024
• KA650 Revision Control
  | 2-0 MicroVAX KA650 CPUS ......................................... 8... | Revision levels are tracked according to DEC Standard 068....
  135 KB (5,037 words) - 14:06, 2 July 2022
• VAXft series
  ...t tolerant]] [[VAX]] computers produced by [[Digital Equipment Corporation|DEC]]. They used [[redundancy]] to produce reliable operation. ...cable' running between the CPUs. The cable allowed [[hardware]] in the two CPUs to check, on an [[instruction]]-by-instruction basis, that they were produc
  2 KB (307 words) - 08:39, 13 May 2024
• PDP-10 I/O Bus
  ...DT01C I/O Bus Switch allowed a device to be switched between two different CPUs. ...d circuit board|PCBs]] at each end, which plugged into slots in a standard DEC [[backplane]]; these later became the CJ connectors.
  1 KB (234 words) - 14:22, 23 October 2022
• VAX 10000 series
  ...ranging from 1 to 4, depending on the number of [[Central Processing Unit|CPUs]] in the system. They shared much of their cabinetry and components with the [[DEC Alpha|Alpha]]-based [[10000 AXP series]] systems as well as the VAX 7000 se
  2 KB (214 words) - 15:28, 23 May 2024
• Laser System Bus
  ...000 series]], and also used in other later [[Digital Equipment Corporation|DEC]] computers. ...s the bus interfaces considerably. The large [[cache]]s on the 7000 series CPUs made this tradeoff reasonable. The LSB is [[pipeline]]d, though; this allow
  3 KB (396 words) - 01:44, 8 May 2024
• VAX 85xx, 87xx, and 88xx systems
  ...documentation gives the expansion of 'NMI'). The [[Central Processing Unit|CPUs]], [[main memory]] and [[input/output|I/O]] adapters (called 'NBIs') all co ...oughout, organized in [[synchronous]] logic. (In dual-CPU systems, the two CPUs run off a common [[clock]].)
  8 KB (1,158 words) - 03:12, 23 May 2024
• Installing ULTRIX-11 V1.0 on SIMH
  Wed Dec 31 19:02:20 EST 1969 Wed Dec 31 19:32:43 EST 1969
  33 KB (4,919 words) - 12:31, 21 June 2023
• Common File System
  [http://bitsavers.org/pdf/dec/pdp10/TOPS20/V7/MGR_GUIDE.MEM.txt TOPS-20 System Manager's Guide June 1990 explains in detail how the '''Common File System''' (CFS) works on the [[DEC]] [[PDP-10]], [[DECSYSTEM-20]] computer running the [[TOPS-20]] operating s
  53 KB (6,770 words) - 13:15, 16 November 2023
• MCA20 Cache
  The MCA20 consists of 6 [[DEC card form factor|hex]] cards, of 3 types: ...here (including on the M8513 Cache Control card), and included in all KL10 CPUs.
  3 KB (490 words) - 18:09, 14 November 2023
• M-bus
  The '''M-bus''' from [[Digital Equipment Corporation|DEC]] was a unique [[synchronous]] [[bus]] used in some [[VAXstation]]s. It sup ...tent data. The M-bus also supported [[interrupt]]s from [[peripheral]]s to CPUs. It used [[parity]] for [[error detection]].
  862 bytes (120 words) - 14:10, 15 January 2024
• VAX 8200/8300 Revision Control
  | Revision levels are tracked according to DEC Standard 068.... | Part revisions are tracked according to DEC Standard 012 conventions. Each part has an alphanumeric revision, up to a
  198 KB (5,881 words) - 23:03, 28 March 2024

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