Difference between revisions of "KT11-D Memory Management Unit"
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The '''KT11-D Memory Management''' was an option for the [[KD11-A CPU]] of the [[PDP-11/40]] which provided [[memory management]]. It did not provide the full [[PDP-11 Memory Management]], but the simplified subset; in fact, the KT11-D is the archetype for that subset. | The '''KT11-D Memory Management''' was an option for the [[KD11-A CPU]] of the [[PDP-11/40]] which provided [[memory management]]. It did not provide the full [[PDP-11 Memory Management]], but the simplified subset; in fact, the KT11-D is the archetype for that subset. | ||
| − | It was a [[hex]] card (M7236) which plugged into a dedicated, pre-wrired slot in the [[Central Processing Unit|CPU]]'s [[backplane]]. [[Digital Equipment Corporation|DEC]] documentation indicates that the KT11-D required the [[KJ11-A Stack Limit Register]] option but this may just be an artifact of DEC PDP-11 software. | + | It was a [[hex]] card (M7236) which plugged into a dedicated, pre-wrired slot in the [[Central Processing Unit|CPU]]'s [[backplane]]. [[Digital Equipment Corporation|DEC]] documentation indicates that the KT11-D required the [[KJ11-A Stack Limit Register]] option (see e.g. EK-11040-TM-002, pg. 4-22) but this may just be an artifact of DEC PDP-11 software. |
To install the KT11-D, in addition to installing the card in the backplane slot, a number of [[jumper]]s on other CPU cards have to be adjusted. Two [[capacitor]]s also have to be installed, to modify timing delays in the CPU. | To install the KT11-D, in addition to installing the card in the backplane slot, a number of [[jumper]]s on other CPU cards have to be adjusted. Two [[capacitor]]s also have to be installed, to modify timing delays in the CPU. | ||
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* "KT11-D Memory Management Option Manual", DEC-11-HKTDA-B-D | * "KT11-D Memory Management Option Manual", DEC-11-HKTDA-B-D | ||
| − | [[Category: PDP-11 Processors]] | + | ==External links== |
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| + | * [http://www.bitsavers.org/pdf/dec/pdp11/1140/KT11D_UsersMan.pdf KT11-D memory management option user's manual] (EK-KT11D-OP-001) | ||
| + | * [http://www.bitsavers.org/pdf/dec/pdp11/1140/KT11-D_Memory_Management_Engineering_Drawings.pdf KT11-D memory management option engineering drawings] | ||
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| + | [[Category: PDP-11 UNIBUS Processors]] | ||
Revision as of 23:10, 7 March 2022
The KT11-D Memory Management was an option for the KD11-A CPU of the PDP-11/40 which provided memory management. It did not provide the full PDP-11 Memory Management, but the simplified subset; in fact, the KT11-D is the archetype for that subset.
It was a hex card (M7236) which plugged into a dedicated, pre-wrired slot in the CPU's backplane. DEC documentation indicates that the KT11-D required the KJ11-A Stack Limit Register option (see e.g. EK-11040-TM-002, pg. 4-22) but this may just be an artifact of DEC PDP-11 software.
To install the KT11-D, in addition to installing the card in the backplane slot, a number of jumpers on other CPU cards have to be adjusted. Two capacitors also have to be installed, to modify timing delays in the CPU.
Further reading
- "KT11-D Memory Management Option Manual", DEC-11-HKTDA-B-D
