View source for KL10

{{Infobox Machine
| name = KL10
| manufacturer = [[Digital Equipment Corporation]]
| architecture = [[PDP-10]]
| year design started = January, 1972
| year first shipped = June, 1975
| form factor = [[mainframe]]
| word size = 36 bits
| physical address = 22 bits
| virtual address = 18 bits (Model A)<br>23 bits (Model B)
| logic type = [[ECL]] [[IC]]s
| design type =  clocked synchronous, [[microcode]]d
| uword width = 80
| ucode length = 1280 (Model A)<br>2K (Model B)
| clock speed = 500 nsec
| cache size = 2K words
| memory speed = 1.0 μsec (initial [[core memory]]), 500 nsec (later [[MOS]] [[main memory]])  
| memory mgmt = [[paging]], 512-word pages
| operating system = [[TOPS-10]], [[TOPS-20]], [[TENEX]]
| predecessor = [[KI10]]
| successor = none
| price = US$250K (CPU), US$600K-1.2M (system)
}}

The '''KL10''' was the third generation of [[PDP-10]] processors. It was built out of [[ECL]], on [[DEC card form factor|hex]] cards.

It was used in the [[DECsystem-10]] models 1080 and 1090 systems (with an external memory bus, compatible with the earlier [[KA10]] and [[KI10]]), and the [[DECSYSTEM-20]] 20xx systems (with an internal memory bus).

Like its predecessor, the KI10, it was initially released in a single-[[processor]] version; a two-CPU version was released later.

==External Links==

* [https://dodlithr.blogspot.com/2014/04/digitals-decsystem-20-part-5-cpu-kl10.html Digital's DECSYSTEM-20 - Part 5 - CPU (KL10)]