View source for KI10

{{Infobox Machine
| name = KI10
| manufacturer = [[Digital Equipment Corporation]]
| architecture = [[PDP-10]]
| year design started = December, 1969
| year first shipped = May, 1972
| form factor = [[mainframe]]
| word size = 36 bits
| physical address = 22 bits
| virtual address = 18 bits
| logic type = [[transistor-transistor logic|TTL]] [[IC]]s
| design type =  clocked synchronous
| clock speed = 1 μsec
| memory speed = 1.0 μsec (fast), 1.8 μsec (slow)
| memory mgmt = [[paging]], 512-word pages
| operating system = [[TOPS-10]], [[TENEX]], [[TYMCOM-X]]
| predecessor = [[KA10]]
| successor = [[KL10]]
| price = US$200K (CPU), US$500K-1M (system)
}}

The '''KI10''' was the second generation of [[PDP-10]] processors (themselves, exact re-implementations of the earlier [[PDP-6]] architecture). It was built out of [[transistor-transistor logic|TTL]] [[integrated circuit|chip]]s, on [[FLIP CHIP]] cards.

It was used in later[[DECsystem-10]] models, running [[TOPS-10]]. Via a series of kludges, it was also possible to run [[TENEX]] on the as-shipped hardware.

It was the first PDP-10 model to provide [[paging]] in its as-shipped form. It was initially released in a single-[[central processing unit|CPU]] version; a two-CPU version was released later.

[[Image:Sys37a.jpg|thumb|left|KI10 at Tymshare]]

[[Category: PDP-10 Processors]]