View source for Am29000

The '''Am29000''' is a family of 32-bit [[Reduced Instruction Set Computer|RISC]] [[Central Processing Unit|CPUs]] from [[AMD]]. As a RISC system, it has a [[load-store architecture]].

It was rooted in the work at [[Berkeley]] which produced other RISC CPUs such as the [[SPARC]]. Work on the initial model, the 29000, started in 1984–1985; it was announced in March, 1987, and released in May, 1988. The initial Am29000 was followed by several other versions, including the 29050 in October, 1990, and ending with the 29040 in 1995.

One major novelty in the [[hardware]] design was that it was a so-called [[Harvard architecture]] machine; there were separate ports on the [[integrated circuit|chip]] for [[instruction]]s and data, intended to be attached to separate [[main memory]] banks. (This allows each bank to be customized for the expected memory reference patterns - sequential for instructions.) Internally, it uses a four-stage [[pipeline]], but it can still [[execute]] one instruction every [[clock cycle]]. 

==External links==

* [https://bitsavers.org/components/amd/Am29000/ Am29000] - documentation at [[Bitsavers]]
** [https://bitsavers.org/components/amd/Am29000/1987_Am29000_Users_Manual.pdf Am29000 User's Manual]

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[[Category: Microprocessors]]
[[Category: Architectures]]