View source for PDP-8 Memory Extension units

All the models of the [[PDP-8 family]] have (mostly optional) '''Memory Extension units''', which use [[bank switching]] to allow more than one PDP-8 [[address space]] worth of [[main memory]] to be installed and used. Although the implementation of the various units differs, they are generally all [[program compatible]].

Discussion of the Memory Extension units uses a second special term used of PDP-8 main memory, in addition to the [[PDP-8 architecture#Instruction Set|PDP-8-specific term 'page']]: 'field'. This refers to a block of 4K words (one PDP-8 address space) of main memory. The Memory Extension units allow the use of multiple 'fields' of main memory, the exact number depending on the model:

{| border=1
! Model !! Extension unit !! Maximum fields !! Comment
|-
|[[PDP-8]] || Type 183 Memory Extension Control || 8
|-
|[[PDP-8/I]] || MC8/I Memory Extension Control || 8
|-
|[[PDP-8/L]] || MC8/L Memory Extension Control || 2
|-
|[[PDP-8/E]] || KM8/E Memory Extension Option || 8
|-
|[[PDP-8/A]] || KM8-A Extended Option - Memory Extension || 8
|-
|[[PDP-8/A]] || KT8-A Memory Management Control || 32
|}

In a memory cycle, the field number is sent down bus lines, effectively as an extension of the address: the details differ from model to model. E.g. in the PDP-8/I, EA0 and EA1 select one of four controllers, while EA2 selects the high or low field on that controller; in the PDP-8/A, EMA0-EMA2 select the field.

==Registers==

The Memory Extension units have three [[register]]s (usually 3 bits wide) used to provide additional addresssing bits, to select the field, during the [[Central Processing Unit|CPU]]'s access to memory: the Instruction Field and associated Instruction Buffer Registers, and Data Field Register; used for (as the names suggest) [[instruction]] and data [[fetch]]es. (The DF is only used for ''indirect'' data word fetches; direct data fetches - i.e. in the same page as the instruction - use the IF.) They could be loaded either manually from the [[front panel]], or under program control (below). The IB contents were loaded into the IF by a [[jump]] or [[subroutine]] call instruction.

In addition, there are two other registers: the Save Field Register, a 6 bit wide register which holds the old contents of the Instruction Field and Data Field Registers when an [[interrupt]] occurs; and the Break Field Register, a 3 bit wide register used during [[data break]] [[Direct Memory Access|DMA]] operations, to select the field those cycles go to.

==Instructions==

A group of added instructions are provided to give access to the registers in the Memory Extension unit, and thereby allow its control:

* Change Data Field (062N1, where 'N' is the desired value to be loaded)
* Change Instruction Field (062N2) - the name is something of a misnomer, as it was actually the IB which was loaded
* 062N3 loads both registers
* Read Data Field (06214) - copies the DF to the AC
* Read Instruction Field (06224) - copies the DF to the AC
* Read Interrupt Buffer (06234) - copies the SRF to the AC
* Restore Memory Field (06244) - copies the SRF to the DF and IB registers

Note that the format of the Change Field instructions limits the maximum number of fields to 8. For the KT8-A Memory Management Control option, two more bits (sometimes referred to as the 'bank') are added to addresses, and the field registers are extended from 3 bits to 5; additional KT8-A Expanded Instructions are also added.

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp8/pdp8e/DEC-8E-HR2B-D-KM8_Mem_Extension_Nov71.pdf DEC-8E-HR2B-D-KM8] - KM8-E Memory Extension and Time-share Option Manual
* [http://www.bitsavers.org/pdf/dec/pdp8/pdp8a/EK-KT08A-UG_jul78.pdf EK-KT08A-UG-001] - KT8-A Memory Management Control User's Guide

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[[Category: PDP-8s]]