Difference between revisions of "IBM System/360"
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The 360 is a BIG endian machine, with values stored as high to low. | The 360 is a BIG endian machine, with values stored as high to low. | ||
+ | The 360 instruction set had 3 major classes of instructions, register to register, specified in a 16-bit field, register to indexed storage, specified in 32 bits, | ||
+ | and storage to storage, specified in 48 bits. There was a 2-bit instruction length field in the op-code to specify the length of the instruction. The op-code always occupied 8 bits. | ||
+ | |||
+ | The register to indexed storage instruction had a 4-bit field to specify the base register, a 4-bit field for the index register and a 12-bit field for the offset. | ||
+ | The contents of the base register, the index register and the offset were added to produce the physical address of the operand. If the base register field was all zeros, then it was not added. | ||
+ | |||
+ | The storage to storage instructions specified two storage locations, and were used for instructions that moved byte strings, compared byte strings and translated byte strings to different character encodings. | ||
+ | |||
+ | The 360 series spanned a wide range of performance, with 6 major models, plus a few special machines. | ||
+ | The 360/20 was a "half-size" 360, it only implemented 16-bit size operations, and had only 8 general purpose registers, so I don't include that as a real member of the 360 series. | ||
+ | |||
+ | Most 360's used microcode, but the 360/44 did not, and 360/91 and /95 and /195 were superscalar machines and were not microcoded. | ||
+ | |||
+ | Other than the model /20, all 360's used I/O processors called channels. On lower machines (/30 through the /50) the channels were emulated in microcode. On higher machines (/65 and up) the channels were separate boxes connected to the memory interface. | ||
+ | |||
+ | The 360/30 internally had 8-bit wide memory and 8-bit data paths, but emulated the full 32-bit instruction set. It was rated at 30K to 40K instructions/second, | ||
+ | depending on instruction mix. The processor was so slow that when I/O was operating, the CPU was totally dedicated to handling the channel operation. The 360/30 had the local storage (register set) in a separately addressed section of main storage. | ||
+ | |||
+ | The 360/40 internally had 16-bit memory and data paths, and was rated at about 80K instructions/second. | ||
+ | |||
+ | The 360/50 was a full 32-bit implementation, and rated at about 160K IPS. | ||
+ | |||
+ | The 360/40 and 360/50 also used a separate core storage for the registers. | ||
+ | |||
+ | The 360/65 had 64-bit memory, and a 56-bit ALU, so it could process double-precision floating point in one cycle. It allowed pairs of identical memory units to be interleaved, increasing performance even more. Memory cycle time was 640 ns, pretty fast for its time. It was possible to connect two /65s to one memory system to create a multiprocessor system, although it was not twice as fast as a single CPU, due to memory interference. It did save some cost as you did not have to duplicate memory and peripherals. A special version of the OS/MVT system called MP65 was developed for the dual processor system, but a lot of installations used it on a single processor because it had enhanced error recovery. The /65 was rated over 600 K IPS. | ||
+ | |||
+ | A variant of the 360/65 was the 360/67, which added base and limit registers to relocate programs. A feature of the 360 instruction set was that all object program files were relocatable, due to the use of the base register. The OS could load a program at any place in memory, and then set the base register to the beginning of that memory partition. But, a limitation of that was that once a program started running, it began to use physical addresses for data, and the return address from a subroutine call. | ||
+ | Therefore, once started, the program could not be relocated to a different memory area. By adding a special (invisible to the program) base register that was added to all memory references, the program could be fooled into seeing itself as always running at location zero. Thus the program could be moved around in memory as needed, after being swapped out and back in. This was used by several timesharing systems. | ||
+ | |||
+ | The 360/75 was the top end of the classic 360 machines. | ||
+ | |||
+ | All of these models were built with SLT (Solid Logic Technology) a hybrid technology where thin film resistors were deposited on 1/2" square ceramic substrates, then thick film silver conductors were deposited, and finally discrete transistor and diode die were flip-chip bonded to the traces. This was pretty low-density technology, generally there were 2 2-input gates per SLT module, consisting of 4 diodes, 4-6 resistors and 2 transistors. IBM did not use flip-flops, but they made D-latches for registers. These occupied 2 1/2 SLT modules for one D-latch. | ||
+ | |||
+ | The 360/85 was a prototype for the 370/165, which was a very similar machine. It was the first IBM machine to use a cache memory ("storage buffer") in static RAM, as well as the first of their commercial machines to use monolithic integrated circuits (called MST for Monolithic Solid Technology). | ||
+ | |||
+ | The models 360/91 and 360/95 and the model 195 were very high end systems which could execute up to 8 instructions in parallel, using all the supercomputing techniques available. | ||
== Emulation == | == Emulation == | ||
I don't think there is any direct S/360 emulators out there... However I'm pretty sure that [[Hercules]] will run System 360 software as the 370 is upwards compatible with the 360. | I don't think there is any direct S/360 emulators out there... However I'm pretty sure that [[Hercules]] will run System 360 software as the 370 is upwards compatible with the 360. |
Revision as of 00:21, 11 June 2018
The System/360 is a groundbreaking mainframe computer introduced by IBM on April 7, 1964. It ran a variety of software, such as MVS.
The System/360 was supplanted by the System/370.
Specs
- The 360 is a 32bit machine
- 16 general purpose 32-bit registers, 0 to 15 (usually Equated to the labels "R0" through "R15")
- 4 floating point 64-bit registers numbered 0, 2, 4 and 6, and
- a Program Status Word (PSW). The program status word is composed of the privileged bit, the program counter, and the memory protection key.
The 360 is a BIG endian machine, with values stored as high to low.
The 360 instruction set had 3 major classes of instructions, register to register, specified in a 16-bit field, register to indexed storage, specified in 32 bits, and storage to storage, specified in 48 bits. There was a 2-bit instruction length field in the op-code to specify the length of the instruction. The op-code always occupied 8 bits.
The register to indexed storage instruction had a 4-bit field to specify the base register, a 4-bit field for the index register and a 12-bit field for the offset. The contents of the base register, the index register and the offset were added to produce the physical address of the operand. If the base register field was all zeros, then it was not added.
The storage to storage instructions specified two storage locations, and were used for instructions that moved byte strings, compared byte strings and translated byte strings to different character encodings.
The 360 series spanned a wide range of performance, with 6 major models, plus a few special machines. The 360/20 was a "half-size" 360, it only implemented 16-bit size operations, and had only 8 general purpose registers, so I don't include that as a real member of the 360 series.
Most 360's used microcode, but the 360/44 did not, and 360/91 and /95 and /195 were superscalar machines and were not microcoded.
Other than the model /20, all 360's used I/O processors called channels. On lower machines (/30 through the /50) the channels were emulated in microcode. On higher machines (/65 and up) the channels were separate boxes connected to the memory interface.
The 360/30 internally had 8-bit wide memory and 8-bit data paths, but emulated the full 32-bit instruction set. It was rated at 30K to 40K instructions/second, depending on instruction mix. The processor was so slow that when I/O was operating, the CPU was totally dedicated to handling the channel operation. The 360/30 had the local storage (register set) in a separately addressed section of main storage.
The 360/40 internally had 16-bit memory and data paths, and was rated at about 80K instructions/second.
The 360/50 was a full 32-bit implementation, and rated at about 160K IPS.
The 360/40 and 360/50 also used a separate core storage for the registers.
The 360/65 had 64-bit memory, and a 56-bit ALU, so it could process double-precision floating point in one cycle. It allowed pairs of identical memory units to be interleaved, increasing performance even more. Memory cycle time was 640 ns, pretty fast for its time. It was possible to connect two /65s to one memory system to create a multiprocessor system, although it was not twice as fast as a single CPU, due to memory interference. It did save some cost as you did not have to duplicate memory and peripherals. A special version of the OS/MVT system called MP65 was developed for the dual processor system, but a lot of installations used it on a single processor because it had enhanced error recovery. The /65 was rated over 600 K IPS.
A variant of the 360/65 was the 360/67, which added base and limit registers to relocate programs. A feature of the 360 instruction set was that all object program files were relocatable, due to the use of the base register. The OS could load a program at any place in memory, and then set the base register to the beginning of that memory partition. But, a limitation of that was that once a program started running, it began to use physical addresses for data, and the return address from a subroutine call. Therefore, once started, the program could not be relocated to a different memory area. By adding a special (invisible to the program) base register that was added to all memory references, the program could be fooled into seeing itself as always running at location zero. Thus the program could be moved around in memory as needed, after being swapped out and back in. This was used by several timesharing systems.
The 360/75 was the top end of the classic 360 machines.
All of these models were built with SLT (Solid Logic Technology) a hybrid technology where thin film resistors were deposited on 1/2" square ceramic substrates, then thick film silver conductors were deposited, and finally discrete transistor and diode die were flip-chip bonded to the traces. This was pretty low-density technology, generally there were 2 2-input gates per SLT module, consisting of 4 diodes, 4-6 resistors and 2 transistors. IBM did not use flip-flops, but they made D-latches for registers. These occupied 2 1/2 SLT modules for one D-latch.
The 360/85 was a prototype for the 370/165, which was a very similar machine. It was the first IBM machine to use a cache memory ("storage buffer") in static RAM, as well as the first of their commercial machines to use monolithic integrated circuits (called MST for Monolithic Solid Technology).
The models 360/91 and 360/95 and the model 195 were very high end systems which could execute up to 8 instructions in parallel, using all the supercomputing techniques available.
Emulation
I don't think there is any direct S/360 emulators out there... However I'm pretty sure that Hercules will run System 360 software as the 370 is upwards compatible with the 360.