Difference between revisions of "Interrupt vector"
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The location may contain an [[instruction]] (as in the [[PDP-10]]), or it may contain the address of the [[code]] which handles the interrupt (as in the [[PDP-11]]). | The location may contain an [[instruction]] (as in the [[PDP-10]]), or it may contain the address of the [[code]] which handles the interrupt (as in the [[PDP-11]]). | ||
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Revision as of 14:49, 18 September 2018
An interrupt vector is the main memory address which controls where the CPU jumps to when an interrupt happens. (Interrupts, more or less by definition, cause the CPU to immediately stop what it is doing, and go do something else.) Traps are usually handled in the same way, since they break into what the CPU is doing.
The location may contain an instruction (as in the PDP-10), or it may contain the address of the code which handles the interrupt (as in the PDP-11).
