Difference between revisions of "BCC 500"
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BCC was formed by members from Berkeley's [[Project Genie]], where they made hardware and software for creating the [[Berkeley Timesharing System|BTSS]] timesharing system running on an [[Scientific Data Systems|SDS]] [[SDS 930|930]], eventually resulting in SDS offering the [[SDS 940|940]] as a product. When the BCC offices closed, the staff went on to [[Xerox]] [[Xerox PARC|PARC]] where they created first the [[MAXC]] and later the [[Alto]]. | BCC was formed by members from Berkeley's [[Project Genie]], where they made hardware and software for creating the [[Berkeley Timesharing System|BTSS]] timesharing system running on an [[Scientific Data Systems|SDS]] [[SDS 930|930]], eventually resulting in SDS offering the [[SDS 940|940]] as a product. When the BCC offices closed, the staff went on to [[Xerox]] [[Xerox PARC|PARC]] where they created first the [[MAXC]] and later the [[Alto]]. | ||
| − | The computer consists of six independent microcoded processors, each having a 24-bit word width | + | The computer consists of six independent microcoded processors, each having a 24-bit word width, 18-bit addressing, and access to a shared memory. The microcode implements a machine code with a 6-bit opcode and 18-bit address field. Two of the processors have expanded hardware capabilities and run user code. The other four are responsible for running operating system code; part in microcode and part in macrocode. |
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Revision as of 09:33, 23 April 2022
The BCC 500 was a computer made by the Berkeley Computer Corporation. When the company went bankrupt, the prototype went to Hawaii and was successfully deployed as an ARPANET host. It was also the hub of the ALOHA network which inspired Ethernet.
BCC was formed by members from Berkeley's Project Genie, where they made hardware and software for creating the BTSS timesharing system running on an SDS 930, eventually resulting in SDS offering the 940 as a product. When the BCC offices closed, the staff went on to Xerox PARC where they created first the MAXC and later the Alto.
The computer consists of six independent microcoded processors, each having a 24-bit word width, 18-bit addressing, and access to a shared memory. The microcode implements a machine code with a 6-bit opcode and 18-bit address field. Two of the processors have expanded hardware capabilities and run user code. The other four are responsible for running operating system code; part in microcode and part in macrocode.
External links
- Documentation at Bitsavers: http://www.bitsavers.org/pdf/bcc/
- and http://www.bitsavers.org/pdf/univOfHawaii/
