Difference between revisions of "FPJ11 floating point accelerator"

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The '''FPJ11 floating point accelerator''' is an optional [[floating point]] [[co-processor]] for the DCJ11 [[J-11 chip set|J-11]] [[PDP-11]] chip, which implements the full [[FP11 floating point]] [[instruction set]]. The FPJ11 is a single [[integrated circuit|chip]] which is plugged into a socket on a J-11 [[Central Processing Unit|CPU]] card.
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[[Image:FPJ11.jpg|250px|thumb|right|FPJ11 chip (plugged into [[KDJ11-A CPU]])]]
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The '''FPJ11 floating point accelerator''' is an optional [[floating point]] [[co-processor]] for the DCJ11 [[J-11 chip set|J-11]] [[PDP-11]] [[Central Processing Unit|CPU]] [[integrated circuit|chip]], which implements the full [[FP11 floating point]] [[instruction set]]. The FPJ11 is a single chip which is plugged into a [[chip socket|socket]] on a [[KDJ11 CPUs|KDJ11 CPU]] card.
  
 
Although the DCJ11 contains a full implementation of the FP11 floating point [[instruction]]s, in [[microcode]], if a J-11 CPU board has an FPJ11 installed, the DCJ111 will automatically notice the presence of the FPJ11, and allow it to handle all floating-point instructions.
 
Although the DCJ11 contains a full implementation of the FP11 floating point [[instruction]]s, in [[microcode]], if a J-11 CPU board has an FPJ11 installed, the DCJ111 will automatically notice the presence of the FPJ11, and allow it to handle all floating-point instructions.
  
Addition of the FPJ11 improves floating-point peformance by a factor of 5 to 8. The interface between the DCJ11 and the FPJ11 is designed to allow overlap between execution of floating point instructions in the FPJ11, and execution of non-floating point instructions in the DCJ11.
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Addition of the FPJ11 improves floating-point performance by a factor of 5 to 8. The interface between the DCJ11 and the FPJ11 is designed to allow overlap between execution of floating point instructions in the FPJ11, and execution of non-floating point instructions in the DCJ11.
  
 
==Versions==
 
==Versions==
  
Two versions of the FPJ11 exist; the FPJ11-AA and the FPJ11-AB. DEC had a number of problems with 'corner cases' (e.g. [[Direct Memory Access|DMA]] during certain floating point instructions), and had to issue revised versions of the FPJ11 and some J-11 CPU boards (e.g. the [[KDJ11-A CPU|KDJ11-A]] to fix them all.
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Two versions of the FPJ11 exist; the FPJ11-AA and the FPJ11-AB. DEC had a number of problems with 'corner cases' (e.g. [[Direct Memory Access|DMA]] during certain floating point instructions), and had to issue revised versions of the FPJ11 and some J-11 CPU boards (e.g. the [[KDJ11-A CPU|KDJ11-A]]) to fix them all.
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==External links==
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* [http://www.bitsavers.org/pdf/dec/internal/Semiconductor_Handbook_V1_1987.pdf DEC Semiconductor Databook, Volume 1], pp. 335-359
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* [http://www.bitsavers.org/pdf/dec/pdp11/1173/fpj11.txt FPJ11 Theory of Operation] μNote #040, 17 September 1985
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* [https://www.subgeniuskitty.com/development/pdp-11/references/fpj11_compat DCJ11/FPJ11 Compatibility]
  
 
==Further reading==
 
==Further reading==
  
* uNote #025, "FPJ11-AA Compatibility with the LSI-11/73 (KDJ11-A)", 28 April 1985
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* μNote #025, "FPJ11-AA Compatibility with the LSI-11/73 (KDJ11-A)", 28 April 1985
* uNote #040, "FPJ11 Theory of Operation", 17 September 1985
 
  
{{PDP-11}}
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[[Category: PDP-11 Processors]]

Latest revision as of 20:06, 2 July 2023

FPJ11 chip (plugged into KDJ11-A CPU)

The FPJ11 floating point accelerator is an optional floating point co-processor for the DCJ11 J-11 PDP-11 CPU chip, which implements the full FP11 floating point instruction set. The FPJ11 is a single chip which is plugged into a socket on a KDJ11 CPU card.

Although the DCJ11 contains a full implementation of the FP11 floating point instructions, in microcode, if a J-11 CPU board has an FPJ11 installed, the DCJ111 will automatically notice the presence of the FPJ11, and allow it to handle all floating-point instructions.

Addition of the FPJ11 improves floating-point performance by a factor of 5 to 8. The interface between the DCJ11 and the FPJ11 is designed to allow overlap between execution of floating point instructions in the FPJ11, and execution of non-floating point instructions in the DCJ11.

Versions

Two versions of the FPJ11 exist; the FPJ11-AA and the FPJ11-AB. DEC had a number of problems with 'corner cases' (e.g. DMA during certain floating point instructions), and had to issue revised versions of the FPJ11 and some J-11 CPU boards (e.g. the KDJ11-A) to fix them all.

External links

Further reading

  • μNote #025, "FPJ11-AA Compatibility with the LSI-11/73 (KDJ11-A)", 28 April 1985