Difference between revisions of "SDS 930"
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Latest revision as of 09:00, 11 July 2023
The SDS 930 (renamed to XDS 930 after SDS was purchased by Xerox and renamed 'XDS') was a mainframe with a 24-bit word length (with an extra bit for parity). It was constructed out of bipolar discrete transistors, and used core memory.
The memory was available in bank sizes of 4KW, 8KW and 16KW; the basic system could hold up to two banks, up to a maximum of 32KW. Use of more than 16KW required optional bank switching hardware. The basic configuration included multiply and divide in hardware, but no floating point in hardware (although there are instructions to support it, such as normalization, etc).
A 930 was upgraded with memory management hardware (including virtual memory) by Project Genie at UC Berkeley, to allow it to be used for creating the Berkeley Timesharing System; that machine was effectively the prototype of the later SDS 940.
External links
- SDS 930 - documentation at Bitsavers
- SDS 9xx - programs
- Modifications to the SDS 930 Computer for the Implementation of Time-Sharing