Difference between revisions of "Digital Storage Architecture"

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The Digital Storage Architecture (acronym: DSA) is one of the building blocks of [[Digital Equipment|DEC]] computer system architectures.  
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The '''Digital Storage Architecture''' (usually given as the acronym, '''DSA''') is one of the building blocks of [[Digital Equipment|DEC]] computer system architectures.  
  
 
== DSA Subsystem Overview ==
 
== DSA Subsystem Overview ==
(taken from: [http://bitsavers.org/pdf/dec/dsa/dssi/Storage_Systems_Port_Rev_3.1.0_198911.txt DSA specification at bitsavers.org])
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(taken from: Storage Systems Port specification)
  
 
A Digital Storage Architecture (DSA) subsystem consists of a host, an intelligent mass storage controller, a communications mechanism, and related software entities.
 
A Digital Storage Architecture (DSA) subsystem consists of a host, an intelligent mass storage controller, a communications mechanism, and related software entities.
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and,
 
and,
  
* Diagnostics and Utilities -- for mass storage controller and I/O device diagnostic and utility program control; defined in the Diagnostics and Utilities Protocol (DUP) specification.
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* Diagnostics and Utilities -- for mass storage controller and I/O device diagnostic and utility program control; defined in the Diagnostics and Utilities Protocol (DUP) specification.
  
The host and controller are physically connected by a hardware communications mechanism through a port located in each. The hardware communications mechanism permits the host and controller to communicate with each other using the higher level protocols and to transfer data between the two as well. The port provides the software to hardware interface necessary for software processes, located in both the host and controller, to access the communications mechanism for those purposes. The software to hardware interface is referred to as the port "access protocol."  
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The host and controller are physically connected by a hardware communications mechanism through a port located in each. The hardware communications mechanism permits the host and controller to communicate with each other using the higher level protocols and to transfer data between the two as well. The port provides the software to hardware interface necessary for software processes, located in both the host and controller, to access the communications mechanism for those purposes. The software to hardware interface is referred to as the port "access protocol."  
  
The host and controller each use two levels of software to accomplish their tasks.  The higher level software process is called a "class driver" in the host and a "server" in the controller.  The class driver and server are concerned with the specifics of I/O device control and communicate with each other using the higher level protocol messages via a logical communications path known as a "connection."  The lower level software process in both the host and controller is known as the "port driver" and is concerned only with providing communications services for the higher level processes across the communications mechanism through the port.
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The host and controller each use two levels of software to accomplish their tasks.  The higher level software process is called a "class driver" in the host and a "server" in the controller.  The class driver and server are concerned with the specifics of I/O device control and communicate with each other using the higher level protocol messages via a logical communications path known as a "connection."  The lower level software process in both the host and controller is known as the "port driver" and is concerned only with providing communications services for the higher level processes across the communications mechanism through the port.
  
 
The host and controller typically provide multiple higher level software processes (i.e., class drivers and servers), one for each higher level protocol they support. Hosts provide a single port driver for each different communications mechanism (i.e., port type) they support. Controllers typically support only one communications mechanism and therefore provide only one port driver.
 
The host and controller typically provide multiple higher level software processes (i.e., class drivers and servers), one for each higher level protocol they support. Hosts provide a single port driver for each different communications mechanism (i.e., port type) they support. Controllers typically support only one communications mechanism and therefore provide only one port driver.
  
The Storage Systems Port is an interface which enables use of the Unibus, Q-Bus, BI, and XMI busses as communications mechanisms between a host and a controller.   
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The Storage Systems Port is an interface which enables use of the [[UNIBUS|Unibus]], [[QBUS|Q-Bus]], [[VAX Bus Interconnect|BI]], and [[XMI]] busses as communications mechanisms between a host and a controller.   
  
 
Figure 1-1 illustrates the various components of a DSA storage subsystem that utilizes the Storage Systems Port.
 
Figure 1-1 illustrates the various components of a DSA storage subsystem that utilizes the Storage Systems Port.
  
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<pre>
 
             Host                    Mass Storage Controller  
 
             Host                    Mass Storage Controller  
 
       + - - - - - - - - +                + - - - - - - - - +   
 
       + - - - - - - - - +                + - - - - - - - - +   
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           |        Unibus, Q-Bus, BI, or XMI        |       
 
           |        Unibus, Q-Bus, BI, or XMI        |       
 
           +------------------------------------------+       
 
           +------------------------------------------+       
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</pre>
    Figure 1-1:  Example  Storage  Systems  Port  Based  DSA
 
                Subsystem
 
  
[[Category: DEC Acronyms]]
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Figure 1-1: Example Storage Systems Port Based DSA Subsystem
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==Further reading==
 +
 
 +
* ''Digital Storage Technology Handbook'', 1989 (EC-H0374-45/89) - Chapter 3, The Digital Storage Architecture
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==External links==
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* [http://bitsavers.org/pdf/dec/disc/brochure/RA60_RA80_And_RA81_Disk_Drives_Brochure_Aug82.pdf The RA60, RA80 and RA81 Disk Drives and The Digital Storage Architecture] - brochure
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* [http://bitsavers.org/pdf/dec/dsa/dssi/Storage_Systems_Port_Rev_3.1.0_198911.txt Storage Systems Port] - SSP specification at [[Bitsavers]]; contains a DSA overview
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[[Category: DEC Mass Storage]]

Latest revision as of 20:26, 18 August 2023

The Digital Storage Architecture (usually given as the acronym, DSA) is one of the building blocks of DEC computer system architectures.

DSA Subsystem Overview

(taken from: Storage Systems Port specification)

A Digital Storage Architecture (DSA) subsystem consists of a host, an intelligent mass storage controller, a communications mechanism, and related software entities.

The controller contains intelligence to perform detailed I/O handling tasks such as: controlling the physical functions of an I/O device, transferring data to/from an I/O device or to/from the host, buffering the data as necessary, optimizing requests for maximum throughput, detecting and recovering from I/O errors, etc. The host simply sends I/O requests to the controller and is notified when the controller has performed all the I/O tasks necessary to fulfill the request to the fullest extent possible.

The communication of I/O requests and completion notices is message packet oriented, controlled by higher level protocols. Currently there are three higher level protocols defined within DSA:

  • Disk -- for disk I/O device control; defined in the Mass Storage Control Protocol (MSCP) specification,
  • Tape -- for tape I/O device control; defined in the Tape Mass Storage Control Protocol (TMSCP) specification,

and,

  • Diagnostics and Utilities -- for mass storage controller and I/O device diagnostic and utility program control; defined in the Diagnostics and Utilities Protocol (DUP) specification.

The host and controller are physically connected by a hardware communications mechanism through a port located in each. The hardware communications mechanism permits the host and controller to communicate with each other using the higher level protocols and to transfer data between the two as well. The port provides the software to hardware interface necessary for software processes, located in both the host and controller, to access the communications mechanism for those purposes. The software to hardware interface is referred to as the port "access protocol."

The host and controller each use two levels of software to accomplish their tasks. The higher level software process is called a "class driver" in the host and a "server" in the controller. The class driver and server are concerned with the specifics of I/O device control and communicate with each other using the higher level protocol messages via a logical communications path known as a "connection." The lower level software process in both the host and controller is known as the "port driver" and is concerned only with providing communications services for the higher level processes across the communications mechanism through the port.

The host and controller typically provide multiple higher level software processes (i.e., class drivers and servers), one for each higher level protocol they support. Hosts provide a single port driver for each different communications mechanism (i.e., port type) they support. Controllers typically support only one communications mechanism and therefore provide only one port driver.

The Storage Systems Port is an interface which enables use of the Unibus, Q-Bus, BI, and XMI busses as communications mechanisms between a host and a controller.

Figure 1-1 illustrates the various components of a DSA storage subsystem that utilizes the Storage Systems Port.

             Host                     Mass Storage Controller 
      + - - - - - - - - +                + - - - - - - - - +  
      |                 |  Higher Level  |                 |  
         +-----------+       Protocol       +-----------+     
      |  |   Class   |  |     (HLP)      |  |    HLP    |  |  
         |   Driver  | <------------------> |   Server  |     
      |  +-----------+  |   Connection   |  +-----------+  |  
               A                                  A           
      |        |        |                |        |        |  
               |                                  |           
      |        |        |                |        |        |  
               V              SSP                 V           
      |  +-----------+  |    Access      |  +-----------+  |  
         |   SSP     |      Protocol        |   SSP     |     
      |  |   Port    | <------------------> |   Port    |  |  
         |   Driver  |                      |   Driver  |     
      |  +-----------+  |                |  +-----------+  |  
               A                                  A           
      + - - - -|- - - - +                + - - - -|- - - - +  
               |                                  |           
               V                                  V           
           +------+----------------------------+------+       
           | Port |                            | Port |       
           + -  - +                            + -  - +       
           |        Unibus, Q-Bus, BI, or XMI         |       
           +------------------------------------------+       

Figure 1-1: Example Storage Systems Port Based DSA Subsystem

Further reading

  • Digital Storage Technology Handbook, 1989 (EC-H0374-45/89) - Chapter 3, The Digital Storage Architecture

External links