Difference between revisions of "BCC 500"
From Computer History Wiki
(Last page of log book posted to Bitsavers; it's from February 1980.) |
(→External links: 1979 tape from U Hawaii.) |
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* [http://www.bitsavers.org/pdf/univOfHawaii/ University of Hawaii] - more | * [http://www.bitsavers.org/pdf/univOfHawaii/ University of Hawaii] - more | ||
** [http://www.bitsavers.org/pdf/univOfHawaii/R-1_BCC500_DesignFeatures_Rev_Mar74.pdf Design Features of the BCC 500 CPU] | ** [http://www.bitsavers.org/pdf/univOfHawaii/R-1_BCC500_DesignFeatures_Rev_Mar74.pdf Design Features of the BCC 500 CPU] | ||
+ | * [http://bitsavers.org/bits/UniversityOfHawaii/BCC-500/ Tape image "BCC 500 Proof Tape] | ||
* [http://bwlampson.site/06a-BCC500Notes/06a-BCC500Notes.pdf Some Remarks on a Large New Time-Sharing System] | * [http://bwlampson.site/06a-BCC500Notes/06a-BCC500Notes.pdf Some Remarks on a Large New Time-Sharing System] | ||
* [http://bwlampson.site/06-DynamicProtect/06-DynamicProtect.pdf Dynamic protection structures] | * [http://bwlampson.site/06-DynamicProtect/06-DynamicProtect.pdf Dynamic protection structures] |
Revision as of 09:46, 8 March 2024
The BCC 500 was a computer made by the Berkeley Computer Corporation. When the company went bankrupt, the prototype went to Hawaii and was successfully deployed as an ARPANET host until 1980. It was also the hub of the ALOHA network which inspired Ethernet.
The computer consists of six independent microcoded processors, having a 24-bit word width, 18-bit addressing, and access to a shared memory. The microcode implements a machine code with a 6-bit opcode and 18-bit address field. Two of the processors have expanded hardware capabilities and run user code. The other four are each responsible for implementing their own part of the operating system; part in microcode and part in macrocode.