Difference between revisions of "BCC 500"

From Computer History Wiki
Jump to: navigation, search
(Clarify system processors do their own part of the OS.)
m (Typo.)
 
(14 intermediate revisions by 2 users not shown)
Line 1: Line 1:
 
[[Image:BCC-500_1.jpg|300px|right|thumb|BCC 500]]
 
[[Image:BCC-500_1.jpg|300px|right|thumb|BCC 500]]
  
The '''BCC 500''' was a computer made by the Berkeley Computer Corporation.  When the company went bankrupt, the prototype went to Hawaii and was successfully deployed as an [[ARPANET]] host.  It was also the hub of the [[ALOHA network]] which inspired [[Ethernet]].
+
The '''BCC 500''' was a computer made by the [[Berkeley Computer Corporation]], from an initial design at [[Project GENIE]].  When the company went bankrupt in 1971, the prototype was sold to University of Hawaii.  After two years of refurbishment it was successfully deployed as an [[ARPANET]] host until 1980.  It was also the hub of the [[ALOHA network]] which inspired [[Ethernet]].
  
BCC was formed by members from Berkeley's [[Project Genie]], where they made hardware and software for creating the [[Berkeley Timesharing System|BTSS]] timesharing system running on an [[Scientific Data Systems|SDS]] [[SDS 930|930]], eventually resulting in SDS offering the [[SDS 940|940]] as a productWhen the BCC offices closed, the staff went on to [[Xerox]] [[Xerox PARC|PARC]] where they created first the [[MAXC]] and later the [[Alto]].
+
The computer consisted of six independent [[microcode]]d processors, having a 24-bit word width, 18-bit addressing, and access to a shared memory.  The microcode implemented an [[instruction set]] with a 6-bit [[operation code|opcode]] and 18-bit [[address]] field, as well as a subset of the [[SDS 940|940]] instruction setTwo of the processors had expanded hardware capabilities and ran user code.  The other four were each responsible for implementing their own part of the [[operating system]]; part in microcode and part in macrocode.
  
The computer consists of six independent microcoded processors, having a 24-bit word width, 18-bit addressing, and access to a shared memoryThe microcode implements a machine code with a 6-bit opcode and 18-bit address fieldTwo of the processors have expanded hardware capabilities and run user code.  The other four are each responsible for implementing their own part of the operating system; part in microcode and part in macrocode.
+
At BCC, an [[IBM System/360|IBM 360/30]] acted as a [[front end]], handling tape drives, card readers, and printersThis was replaced by an [[HP2100]]A at HawaiiA [[PDP-11/10]] running [[ELF operating system|ELF]] connected to the ARPANET.
  
 
{{semi-stub}}
 
{{semi-stub}}
 +
 +
==See also==
 +
 +
* [[:Image:BCC-500-microengine.png|Internal architecture of the BCC 500 microengine]]
  
 
== External links ==
 
== External links ==
  
* Documentation at Bitsavers: http://www.bitsavers.org/pdf/bcc/
+
* [http://www.bitsavers.org/pdf/bcc/ BCC] - documentation at [[Bitsavers]]
* and http://www.bitsavers.org/pdf/univOfHawaii/
+
* [http://www.bitsavers.org/pdf/univOfHawaii/Aloha_BCC-500/ Aloha BCC-500] - more
 +
** [http://www.bitsavers.org/pdf/univOfHawaii/R-1_BCC500_DesignFeatures_Rev_Mar74.pdf Design Features of the BCC 500 CPU]
 +
** [http://www.bitsavers.org/pdf/univOfHawaii/Aloha_BCC-500/pictures/hawaii_bcc500_block_diagram.jpg BCC500 block diagram]
 +
** [http://www.bitsavers.org/pdf/univOfHawaii/Aloha_BCC-500/logbooks/Last_BCC500_HW_Log_Entry_19800229.pdf Last BCC500 Log Entry]
 +
** [http://www.bitsavers.org/bits/UniversityOfHawaii/BCC-500/ Tape image "BCC 500 Proof Tape"]
 +
* [https://github.com/larsbrinkhoff/bcc-500/ Files from the BCC 500 computer at University of Hawaii] - extracted from the above
 +
** [https://github.com/larsbrinkhoff/bcc-500/tree/master/doc BCC 500 documents] - from Butler Lampson
 +
** [https://github.com/larsbrinkhoff/bcc-500/tree/master/text Extracted files]
 +
*** [https://github.com/larsbrinkhoff/bcc-500/blob/master/text/WWL%3A%20(PERSONAL%20FILES)/ARCHITECTURE The BCC 500 Computing System: An Introduction and Overview]
 +
*** [https://github.com/larsbrinkhoff/bcc-500/blob/master/text/SYSTEM-10%3A%20(DOCUMENTATION)/PFS-MANUAL PFS Reference Manual] - '"PFS" probably stands for 'Preliminary File System'
 +
* [http://bwlampson.site/06a-BCC500Notes/06a-BCC500Notes.pdf Some Remarks on a Large New Time-Sharing System]
 +
* [http://bwlampson.site/06-DynamicProtect/06-DynamicProtect.pdf Dynamic protection structures]
  
 
[[Category: Mainframes]]
 
[[Category: Mainframes]]
 +
[[Category: 24-bit Computers]]
 +
[[Category: Unique Computers]]

Latest revision as of 16:27, 14 January 2025

BCC 500

The BCC 500 was a computer made by the Berkeley Computer Corporation, from an initial design at Project GENIE. When the company went bankrupt in 1971, the prototype was sold to University of Hawaii. After two years of refurbishment it was successfully deployed as an ARPANET host until 1980. It was also the hub of the ALOHA network which inspired Ethernet.

The computer consisted of six independent microcoded processors, having a 24-bit word width, 18-bit addressing, and access to a shared memory. The microcode implemented an instruction set with a 6-bit opcode and 18-bit address field, as well as a subset of the 940 instruction set. Two of the processors had expanded hardware capabilities and ran user code. The other four were each responsible for implementing their own part of the operating system; part in microcode and part in macrocode.

At BCC, an IBM 360/30 acted as a front end, handling tape drives, card readers, and printers. This was replaced by an HP2100A at Hawaii. A PDP-11/10 running ELF connected to the ARPANET.

See also

External links