Difference between revisions of "IMLAC PDS-1"

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m (Jnc moved page Imlac PDS-1 to IMLAC PDS-1: Case as per original docs)
(Programmable Display System. We ought to mention PDS-4 somewhere, but maybe not on a separate page.)
 
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The '''IMLAC PDS-1''' was a very early [[workstation]] (1970, well before the [[Xerox Alto]]). It generally did not have any [[secondary storage]], and was mostly used only as a [[terminal]] on a larger system, communicating with it via an [[asynchronous serial line]].
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The '''IMLAC PDS-1''' was a very early [[workstation]] (1970, well before the [[Xerox Alto]]). PDS means Programmable Display System.  It generally did not have any [[secondary storage]], and was mostly used only as a [[terminal]] on a larger system, communicating with it via an [[asynchronous serial line]].
  
 
This computer was host to the first version of the game [[Maze War]].  As a terminal, it was used to develop the game [[Zork]], and edit the manuscript for the book ''Gödel, Escher, Bach''.
 
This computer was host to the first version of the game [[Maze War]].  As a terminal, it was used to develop the game [[Zork]], and edit the manuscript for the book ''Gödel, Escher, Bach''.
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It had a [[vector graphics]] [[display]], controlled by a [[display program]] in the machine's [[main memory]] ([[core memory]], at that point in time). It also included a small 16-bit [[minicomputer]]; the two shared access to the main memory, with the display processor having priority for access. The [[Central Processing Unit|CPU]] (said by many to be reminiscent of a [[PDP-8 family|PDP-8]]) was built out of [[74 series]] [[integrated circuit|ICs]], and had a classical [[front panel]] for control. The display was a [[cathode ray tube|CRT]].
 
It had a [[vector graphics]] [[display]], controlled by a [[display program]] in the machine's [[main memory]] ([[core memory]], at that point in time). It also included a small 16-bit [[minicomputer]]; the two shared access to the main memory, with the display processor having priority for access. The [[Central Processing Unit|CPU]] (said by many to be reminiscent of a [[PDP-8 family|PDP-8]]) was built out of [[74 series]] [[integrated circuit|ICs]], and had a classical [[front panel]] for control. The display was a [[cathode ray tube|CRT]].
  
There were several different variants; the original 'PDS-1' had an [[instruction]] [[cycle time]] of 2.0 μsec, and the 'PDS-1D' had a cycle time of 1.8 μsec, but seems otherwise to have been almost identical. There were also 'Alpha' and 'Graphics' versions (see below); the PDS-1D was a 'Graphics' machine.
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There were several different variants; the original 'PDS-1' had an [[instruction]] [[cycle time]] of 2.0 μsec, and the 'PDS-1D' had a cycle time of 1.8 μsec, but seems otherwise to have been almost identical. There were also 'Alpha' and 'Graphics' versions (see below); the PDS-1D was a 'Graphics' machine.  The last model was called PDS-4, with a memory cycle of "less than a microsecond" and optional floating point hardware.
  
 
==Differences between Alpha and Graphics machines==
 
==Differences between Alpha and Graphics machines==
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* [http://www.bitsavers.org/pdf/imlac/ imlac] - documentation at [[Bitsavers]]
 
* [http://www.bitsavers.org/pdf/imlac/ imlac] - documentation at [[Bitsavers]]
 
** [http://www.bitsavers.org/pdf/imlac/PDS-1_TechnicalMan.pdf IMLAC PDS-1 Programmable Display System Preliminary Technical and Operator Manual]
 
** [http://www.bitsavers.org/pdf/imlac/PDS-1_TechnicalMan.pdf IMLAC PDS-1 Programmable Display System Preliminary Technical and Operator Manual]
** [http://www.bitsavers.org/pdf/imlac/PDS-1D_ProgrammingGuide.pdf IMLAC PDS-1D Programming Guide]
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** [http://www.bitsavers.org/pdf/imlac/PDS-1D_ProgrammingGuide.pdf IMLAC PDS-1D Programming Guide] <!-- also http://www.ubanproductions.com/ImlacDocs/PDS-1D_ProgrammingGuide.pdf -->
 
* [http://www.ubanproductions.com/imlac.html Imlac Anatomy]
 
* [http://www.ubanproductions.com/imlac.html Imlac Anatomy]
 
** [http://www.ubanproductions.com/imlac_sw.html Imlac Software Library] - includes many IMLAC documents, not all of which are at Bitsavers (above)
 
** [http://www.ubanproductions.com/imlac_sw.html Imlac Software Library] - includes many IMLAC documents, not all of which are at Bitsavers (above)

Latest revision as of 07:54, 10 June 2025

The IMLAC PDS-1 was a very early workstation (1970, well before the Xerox Alto). PDS means Programmable Display System. It generally did not have any secondary storage, and was mostly used only as a terminal on a larger system, communicating with it via an asynchronous serial line.

This computer was host to the first version of the game Maze War. As a terminal, it was used to develop the game Zork, and edit the manuscript for the book Gödel, Escher, Bach.

It had a vector graphics display, controlled by a display program in the machine's main memory (core memory, at that point in time). It also included a small 16-bit minicomputer; the two shared access to the main memory, with the display processor having priority for access. The CPU (said by many to be reminiscent of a PDP-8) was built out of 74 series ICs, and had a classical front panel for control. The display was a CRT.

There were several different variants; the original 'PDS-1' had an instruction cycle time of 2.0 μsec, and the 'PDS-1D' had a cycle time of 1.8 μsec, but seems otherwise to have been almost identical. There were also 'Alpha' and 'Graphics' versions (see below); the PDS-1D was a 'Graphics' machine. The last model was called PDS-4, with a memory cycle of "less than a microsecond" and optional floating point hardware.

Differences between Alpha and Graphics machines

The first type of the IMLAC PDS-1 was called an Alpha machine, and had a somewhat less capable display processor than the later Graphics machines. There is no surviving documentation for the Alpha machine, but the details have been reverse engineered by Zachary Harper from the listing for the Freeway Crossing game.

On an Alpha machine, the D LDXA and D LDYA instructions load bits 4 to 10 into the accumulator MSB. On a Graphics machine, bits 6-11 load into the MSB. On both machines, bits 12-16 are loaded into the LSB, and the least significant "½ point" bit is cleared.

On an Alpha machine, beam deflection from the MSB is scaled up by 9 LSB units. On a Graphics machine, the MSB is scaled up by 16 LSB units. (The LSB least significant bit is 0.5 units.)

On an Alpha machine, incrementing or decrementing the LSB does not add any carry to the MSB. The LSB can go outside 0-15 units; exactly by how much is unknown. On an Graphics machine, going outside 0-15 wraps around and carries to the MSB.

On an Alpha machine, incrementing or decrementing the MSB is done according to the scale factor. On a Graphics machine, it's done by 1.

External links