Scheme Chip: Difference between revisions
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Four generations. Link to repository with original files. |
→External links: Scheme chip wiki and SCHEME-79 simulator. |
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* [https://dl.acm.org/doi/pdf/10.1145/62678.62690 Scheme86 - A System for Interpreting Scheme] | * [https://dl.acm.org/doi/pdf/10.1145/62678.62690 Scheme86 - A System for Interpreting Scheme] | ||
* [https://github.com/larsbrinkhoff/scheme-chip-files Scheme chip files from MIT PDP-10 computers] | * [https://github.com/larsbrinkhoff/scheme-chip-files Scheme chip files from MIT PDP-10 computers] | ||
* [http://scheme-chip.net/ Wiki about Scheme chips and Lisp machines] | |||
* [https://github.com/Bradford-Miller/s79-simulator SCHEME-79 simulator] | |||
[[Category: Microprocessors]] | [[Category: Microprocessors]] | ||
Latest revision as of 06:24, 2 September 2026
The Scheme Chips were a series of VLSI LISP machine microprocessors intended to run Scheme. There were four generations: SCHEME-78, SCHEME-79, SCHEME-81, and Scheme86.
External links
- AI memo 514: "Design of LISP-based Processors, or SCHEME: A Dielectric LISP, or Finite Memories Considered Harmful, or LAMBDA: The Ultimate Opcode"
- AI memo 559: "The SCHEME-79 Chip"
- The Assq Chip and Its Progeny
- Scheme86 - A System for Interpreting Scheme
- Scheme chip files from MIT PDP-10 computers
- Wiki about Scheme chips and Lisp machines
- SCHEME-79 simulator
