FP11-B Floating-Point Processor: Difference between revisions

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The '''FP11-B''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (KB11-A and KB11-B CPU variants thereof, respectively); it was the progenitor of the semi-standard [[FP11 floating point]] used in many [[PDP-11]]s.
The '''FP11-B''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers ([[KB11-A CPU|KB11-A]] and [[KB11-B CPU|KB11-B]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was the progenitor of the semi-standard [[FP11 floating point]] used in many [[PDP-11]]s.


It operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the later [[FP11-C Floating-Point Processor]] for these machines, it ran entirely asynchronously to the main CPU, and used a clock which was not synchronized to the basic CPU's clock.  
It operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the later [[FP11-C Floating-Point Processor]] for these machines, it ran entirely [[asynchronous]]ly to the main CPU, and used a clock which was not synchronized to the basic CPU's clock.  


==Implementation==
==Implementation==
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* M8115 Fraction Data Path - Low Order
* M8115 Fraction Data Path - Low Order


{{PDP-11}}
==External links==
* [http://www.bitsavers.org/pdf/dec/pdp11/1145/EK-FP11-MM-003_FP11-B_Floating-Point_Processor_Maintenance_Manual_1974.pdf FP11-B floating point processor maintenance manual] (EK-FP11-MM-003)
* [http://www.bitsavers.org/pdf/dec/pdp11/1145/PDP11_FP11-B_Floating-Point_Processor_Engineering_Drawings_Rev_A_Jul72.pdf FP11-B floating point processor engineering drawings]


[[Category:UNIBUS processors]]
[[Category: PDP-11 UNIBUS Processors]]

Latest revision as of 00:17, 13 October 2022

The FP11-B was a FPP used in the PDP-11/45 and PDP-11/70 computers (KB11-A and KB11-B CPU variants thereof, respectively); it was the progenitor of the semi-standard FP11 floating point used in many PDP-11s.

It operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the later FP11-C Floating-Point Processor for these machines, it ran entirely asynchronously to the main CPU, and used a clock which was not synchronized to the basic CPU's clock.

Implementation

It plugged into special pre-wired slots in the CPU's backplane, and included the following boards:

  • M8112 ROM and ROM Control
  • M8113 Exponent and Data Path
  • M8114 Fraction Data Path - High Order
  • M8115 Fraction Data Path - Low Order

External links