Difference between revisions of "KEV11-C Commercial Instruction Set"
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The version of the KEV11-C option with two uROMs obviously takes two uROM sockets; it is therefore used with a 40-pin hybrid (two chips on one carrier) which holds the two uROMs of the base instruction set. The hybrid is 23-001B6, 23-002B6, or 23-003B6 (for M7264 ECO 10, ECO 12, and ECO 16, respectively). | The version of the KEV11-C option with two uROMs obviously takes two uROM sockets; it is therefore used with a 40-pin hybrid (two chips on one carrier) which holds the two uROMs of the base instruction set. The hybrid is 23-001B6, 23-002B6, or 23-003B6 (for M7264 ECO 10, ECO 12, and ECO 16, respectively). | ||
− | + | [[Category: PDP-11 Processors]] |
Latest revision as of 20:11, 2 July 2023
The KEV11-C Commercial Instruction Set is reportedly (documentation on it is impossible to find) an optional chip for LSI-11 chip set which adds support for a subset of the PDP-11 Commercial Instruction Set, sometimes known as DIS (DIBOL instruction set).
It also apparently includes the PDP-11 Extended Instruction Set (but not the FIS).
The DIS cannot be used with the KEV11-A floating point chip, not only because of the limited number of uROM sockets on LSI-11 CPUcards, but also because the DIS and basic instruction set together use the entire uROM address space.
DIS came as a standard in some commercially-oriented LSI-11 systems; the KD11-P and KD11-Q processors (M7264-BB and M7264-YB, respectively) are CPU models with the KEV11-C installed.
Chip variants
The KEV11-C uses two uROMs, the 3025D 23-004B5 and 3026D (perhaps B?) 23-005B5. (There may also be a hybrid - i.e. single DIP carrier - version of the KEV11-C, but the part number is unknown.)
The version of the KEV11-C option with two uROMs obviously takes two uROM sockets; it is therefore used with a 40-pin hybrid (two chips on one carrier) which holds the two uROMs of the base instruction set. The hybrid is 23-001B6, 23-002B6, or 23-003B6 (for M7264 ECO 10, ECO 12, and ECO 16, respectively).