Difference between revisions of "Fabritek Core Memory"

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[[Image:Moby.JPG|300px|rightt|thumb|The "Moby" Memory]]
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[[Image:Moby.JPG|220px|right|thumb|The "Moby" Memory]]
  
256K x 40 bit core memory.
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The '''Fabritek Core Memory''' was 256K x 40 bit [[core memory]] for the [[PDP-6]] and [[KA10]].
  
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Former Fabri-Tek engineer Gary Andersen told this story:
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''It was one of the first 1 MB add on memories, if not the first, built by a third party vendor.  I gave a paper on the design at the Spring Joint Computer show in Manhattan in May of 1965. Dr. Marvin Minsky, from his artificial intelligence lab, [was in the audience]. Unshaven, in a white dress shirt hanging out in back, and in sock-less sandal shoes he came up to me and said, “I want one.”''
  
[[Category:PDP-10 memories]]
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''I said, all we have is a prototype.  His response was, “I don’t care. Thanks. When you be in Boston again?” Two weeks later our sales guy and I negotiated a 1 MB add on for his DEC PDP6 computers, one of only 26 PDP6 computers made, for about $230,000 for a 5 microsecond cycle time memory that used 80m ferrite cores, plus another $5000 for every 1/2 microsecond better cycle time, I believe. He wrote the order number on the back of an envelope. ''
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[[Image:Fabri-tekPDP-10CoreMemory.jpg|180px|left|thumb|Control panel]]
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''We didn’t believe it, but a week later a hard copy purchase order came from MIT. It was a real chore. Not only the memory, but also the interface. As I remember DEC wasn’t real cooperative. It was a long haul, but we finished and got paid $240,000, I believe''
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{{semi-stub}}
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== External links ==
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* [https://ljkrakauer.com/LJK/60s/moby.htm "Moby Memory", by Larry Krakauer]
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* [https://www.computerhistory.org/collections/catalog/102731715 FABRI-TEK Mass Core "Moby" Memory] - at the [[Computer History Museum|CHM]]
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[[Category: PDP-10 Memories]]

Latest revision as of 20:53, 4 February 2024

The "Moby" Memory

The Fabritek Core Memory was 256K x 40 bit core memory for the PDP-6 and KA10.

Former Fabri-Tek engineer Gary Andersen told this story: It was one of the first 1 MB add on memories, if not the first, built by a third party vendor. I gave a paper on the design at the Spring Joint Computer show in Manhattan in May of 1965. Dr. Marvin Minsky, from his artificial intelligence lab, [was in the audience]. Unshaven, in a white dress shirt hanging out in back, and in sock-less sandal shoes he came up to me and said, “I want one.”

I said, all we have is a prototype. His response was, “I don’t care. Thanks. When you be in Boston again?” Two weeks later our sales guy and I negotiated a 1 MB add on for his DEC PDP6 computers, one of only 26 PDP6 computers made, for about $230,000 for a 5 microsecond cycle time memory that used 80m ferrite cores, plus another $5000 for every 1/2 microsecond better cycle time, I believe. He wrote the order number on the back of an envelope.

Control panel

We didn’t believe it, but a week later a hard copy purchase order came from MIT. It was a real chore. Not only the memory, but also the interface. As I remember DEC wasn’t real cooperative. It was a long haul, but we finished and got paid $240,000, I believe

External links