Difference between revisions of "High-Level Data Link Control"
m (Jnc moved page HDLC to High-Level Data Link Control: Full name) |
(More - a lot more - on top of the framing) |
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The checksum covers the address, control and data fields. The frame is followed either by i) another frame, or ii) the idle pattern - back-to-back flags. | The checksum covers the address, control and data fields. The frame is followed either by i) another frame, or ii) the idle pattern - back-to-back flags. | ||
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| + | On top of that, there is an entire other complex layer of protocol, using various values in the 'Control' field: initialization, testing, station identification, configuration, sequencing, etc. (See the HDLC documentation for more.) | ||
{{semi-stub}} | {{semi-stub}} | ||
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==External links== | ==External links== | ||
| − | * [http://www.acacia-net.com/wwwcla/protocol/iso_4335.htm | + | * [http://www.acacia-net.com/wwwcla/protocol/iso_4335.htm ISO 4335 - HDLC] |
[[Category: Serial Lines]] | [[Category: Serial Lines]] | ||
Latest revision as of 09:03, 29 May 2022
High-Level Data Link Control (usually abbreviated to HDLC) is a protocol used to transmit packets over serial lines (both synchronous and asynchronous). There are a large number of variants (using the fact that the HDLC specification does not fully specify the semantics of all the fields in the header), and also descendants. HDLC is based on the earlier SDLC.
The start and end of the packet (named a 'frame' in HDLC terminology) are marked by a specific bit pattern, '1111110', the 'flag'; instances of that pattern in the user data are obscured by bit stuffing (on synchronous lines) or byte stuffing (on asynchronous lines). In the former, '111111' is replaced, during transmission, by '1111101'; the inserted '0' is removed on reception. In the latter, an 'escape octet', 0x7D, is sent, followed by a modified form of the original data octet (with bit 5 inverted) - this allows all reserved patterns (including flags and escapes) to appear in user data.
HDLC uses NRZI encoding on synchronous lines, to ensure that enough transitions are present to keep the clock synchronized.
An HDLC frame contains these fields:
- Flag - 8 bits
- Address - 8 or more bits
- Control - 8 or 16 bits
- Data - Variable
- Checksum - 16 or 32 bits
The checksum covers the address, control and data fields. The frame is followed either by i) another frame, or ii) the idle pattern - back-to-back flags.
On top of that, there is an entire other complex layer of protocol, using various values in the 'Control' field: initialization, testing, station identification, configuration, sequencing, etc. (See the HDLC documentation for more.)
