Difference between revisions of "KA750 CPU"

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The '''KA750 CPU''' was the [[Central Processing Unit|CPU]] of the [[VAX-11/750]].It was a [[synchronous]] [[microcode]]d design. It was primarily implemented in [[gate array]] [[integrated circuit|chips]] holding 400 NAND [[gate]]s; they were configured at manufacture time into the 39 different types used in the /750.
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[[Image:VAX750block.jpg|right|thumb|300px|VAX-11/750 system block diagram, showing the major KA750 functional units]]
  
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Internally, there were several main [[bus]]ses connecting together functional units within the CPU:
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The '''KA750 CPU''' was the [[Central Processing Unit|CPU]] of the [[VAX-11/750]]. It was a [[synchronous]] [[microcode]]d design. Internally, there were several main [[bus]]ses connecting together functional units within the CPU:
  
 
* MBus
 
* MBus
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* RBus
 
* RBus
  
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The MBus and WBus are [[tri-state]], 32 bits wide; fields in the micro-[[instruction]]s specify the source using each bus on each cycle. The RBus connects scratchpad [[register]]s to the [[arithmetic logic unit|ALU]] and 'super rotator'.
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The MBus and WBus are [[tri-state]], 32 bits wide; fields in the micro-[[instruction]]s specify the source which will use each bus on each cycle. The RBus connects scratchpad [[register]]s to the [[arithmetic logic unit|ALU]] and 'super rotator'.
  
 
Microcode supported micro-[[subroutine]]s, up to 15 levels deep.
 
Microcode supported micro-[[subroutine]]s, up to 15 levels deep.
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* L0003 Memory Interconnect (MIC) - [[virtual memory]] translation buffer, [[cache]], [[main memory]] interface
 
* L0003 Memory Interconnect (MIC) - [[virtual memory]] translation buffer, [[cache]], [[main memory]] interface
 
* L0004 [[UNIBUS]] Interface (UBI) - UNIBUS control and function, ancillary functions
 
* L0004 [[UNIBUS]] Interface (UBI) - UNIBUS control and function, ancillary functions
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* L0005 CPU Control Store (CCS) - microcode [[read-only memory|ROMs]], interface to optional writable control store (WCS)
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* L0005 CPU Control Store (CCS) - microcode [[read-only memory|ROMs]], interface to optional KU750 Writable Control Store (WCS - sometimes informally called the User Control Store - on a [[daughter-board]] of the CCS)
  
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Options use other boards:
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The L0005 CCS was later replaced by the L0008 Patchable Control Store (PCS). Originally, the concept was that the KA750's microcode would not change often, so it was stored in [[read-only memory|PROM]] (unlike the [[KL10]] and [[KA780 CPU|KA780]]). This turned out to be incorrect; like most software, bugs were found regularly. The PCS was designed to store the basic microcode in PROM, but to allow it to be 'patched' dynamically.
  
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* L0006 - Remote Diagnostic Module (RDM)
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CPU options used other boards:
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* L0001 - Floating-Point Accelerator (FPA)
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* L0006 - KC750 Remote Diagnostic Module (RDM)
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* L0001 - FP750 Floating-Point Accelerator (FPA)
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The base CPU does support [[floating point]], but implemented entirely in microcode; the FP750 increases floating-point performance substantially.
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==Backplane details==
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As mentioned in the main /750 article, the CPU slots in the backplane are all customized to particular cards by the buses which run to that slot. The MBus and WBus both run to the DPM, MIC and FPA cards/slots; the UBI card/slot has only the WBus, but not the MBus. The [[CPU/Memory Interconnect|CMI]] runs to some cards/slots - MIC and UBI - but not others: not the DPM, nor the FPA.
  
 
{{semi-stub}}
 
{{semi-stub}}
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* [http://www.bitsavers.org/pdf/dec/vax/750/Introduction_to_the_COMET_Microarchitecture_198003.pdf Introduction to the COMET Microarchitecture]
 
* [http://www.bitsavers.org/pdf/dec/vax/750/Introduction_to_the_COMET_Microarchitecture_198003.pdf Introduction to the COMET Microarchitecture]
 
* [http://www.bitsavers.org/pdf/dec/vax/750/MP01024_KA750_Engineering_Drawings_198009.pdf KA750 Field Maintenance Print Set] (MP01024)
 
* [http://www.bitsavers.org/pdf/dec/vax/750/MP01024_KA750_Engineering_Drawings_198009.pdf KA750 Field Maintenance Print Set] (MP01024)
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* [https://bitsavers.org/pdf/dec/vax/750/MP01390_750_PCS_Engineering_Drawings_198305.pdf PCS Module Field Maintenance Print Set] (MP01390)
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* [https://web.archive.org/web/20071004184501/http://computer-refuge.org/compcollect/dec/vax/11750/L0002-big.jpg L0002 (DPM)] - Data Path Module image
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* [https://web.archive.org/web/20071004184310/http://computer-refuge.org/compcollect/dec/vax/11750/L0003-big.jpg L0003 (MIC)] - Memory Interconnect image
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* [https://web.archive.org/web/20071004184218/http://computer-refuge.org/compcollect/dec/vax/11750/L0008-big.jpg L0008 (PCS)] - Patchable Control Store image
  
 
[[Category: DEC VAX Processors]]
 
[[Category: DEC VAX Processors]]
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[[Category: CMI]]

Latest revision as of 02:33, 18 May 2024

VAX-11/750 system block diagram, showing the major KA750 functional units

The KA750 CPU was the CPU of the VAX-11/750. It was a synchronous microcoded design. Internally, there were several main busses connecting together functional units within the CPU:

  • MBus
  • WBus
  • Control store address (CSA)
  • RBus

The MBus and WBus are tri-state, 32 bits wide; fields in the micro-instructions specify the source which will use each bus on each cycle. The RBus connects scratchpad registers to the ALU and 'super rotator'.

Microcode supported micro-subroutines, up to 15 levels deep.

Components

The basic KA750 was implemented in four large PCBs:

  • L0002 Data Path Module (DPM) - arithmetical and logical functions, micro-sequencer
  • L0003 Memory Interconnect (MIC) - virtual memory translation buffer, cache, main memory interface
  • L0004 UNIBUS Interface (UBI) - UNIBUS control and function, ancillary functions
  • L0005 CPU Control Store (CCS) - microcode ROMs, interface to optional KU750 Writable Control Store (WCS - sometimes informally called the User Control Store - on a daughter-board of the CCS)

The L0005 CCS was later replaced by the L0008 Patchable Control Store (PCS). Originally, the concept was that the KA750's microcode would not change often, so it was stored in PROM (unlike the KL10 and KA780). This turned out to be incorrect; like most software, bugs were found regularly. The PCS was designed to store the basic microcode in PROM, but to allow it to be 'patched' dynamically.

CPU options used other boards:

  • L0006 - KC750 Remote Diagnostic Module (RDM)
  • L0001 - FP750 Floating-Point Accelerator (FPA)

The base CPU does support floating point, but implemented entirely in microcode; the FP750 increases floating-point performance substantially.

Backplane details

As mentioned in the main /750 article, the CPU slots in the backplane are all customized to particular cards by the buses which run to that slot. The MBus and WBus both run to the DPM, MIC and FPA cards/slots; the UBI card/slot has only the WBus, but not the MBus. The CMI runs to some cards/slots - MIC and UBI - but not others: not the DPM, nor the FPA.

External links

Retrieved from "https://gunkies.org/w/index.php?title=KA750_CPU&oldid=34503"