Difference between revisions of "KA750 CPU"
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* [http://www.bitsavers.org/pdf/dec/vax/750/Introduction_to_the_COMET_Microarchitecture_198003.pdf Introduction to the COMET Microarchitecture] | * [http://www.bitsavers.org/pdf/dec/vax/750/Introduction_to_the_COMET_Microarchitecture_198003.pdf Introduction to the COMET Microarchitecture] | ||
* [http://www.bitsavers.org/pdf/dec/vax/750/MP01024_KA750_Engineering_Drawings_198009.pdf KA750 Field Maintenance Print Set] (MP01024) | * [http://www.bitsavers.org/pdf/dec/vax/750/MP01024_KA750_Engineering_Drawings_198009.pdf KA750 Field Maintenance Print Set] (MP01024) | ||
| + | * [https://bitsavers.org/pdf/dec/vax/750/MP01390_750_PCS_Engineering_Drawings_198305.pdf PCS Module Field Maintenance Print Set] (MP01390) | ||
* [https://web.archive.org/web/20071004184501/http://computer-refuge.org/compcollect/dec/vax/11750/L0002-big.jpg L0002 (DPM)] - Data Path Module image | * [https://web.archive.org/web/20071004184501/http://computer-refuge.org/compcollect/dec/vax/11750/L0002-big.jpg L0002 (DPM)] - Data Path Module image | ||
* [https://web.archive.org/web/20071004184310/http://computer-refuge.org/compcollect/dec/vax/11750/L0003-big.jpg L0003 (MIC)] - Memory Interconnect image | * [https://web.archive.org/web/20071004184310/http://computer-refuge.org/compcollect/dec/vax/11750/L0003-big.jpg L0003 (MIC)] - Memory Interconnect image | ||
Latest revision as of 02:33, 18 May 2024
The KA750 CPU was the CPU of the VAX-11/750. It was a synchronous microcoded design. Internally, there were several main busses connecting together functional units within the CPU:
- MBus
- WBus
- Control store address (CSA)
- RBus
The MBus and WBus are tri-state, 32 bits wide; fields in the micro-instructions specify the source which will use each bus on each cycle. The RBus connects scratchpad registers to the ALU and 'super rotator'.
Microcode supported micro-subroutines, up to 15 levels deep.
Components
The basic KA750 was implemented in four large PCBs:
- L0002 Data Path Module (DPM) - arithmetical and logical functions, micro-sequencer
- L0003 Memory Interconnect (MIC) - virtual memory translation buffer, cache, main memory interface
- L0004 UNIBUS Interface (UBI) - UNIBUS control and function, ancillary functions
- L0005 CPU Control Store (CCS) - microcode ROMs, interface to optional KU750 Writable Control Store (WCS - sometimes informally called the User Control Store - on a daughter-board of the CCS)
The L0005 CCS was later replaced by the L0008 Patchable Control Store (PCS). Originally, the concept was that the KA750's microcode would not change often, so it was stored in PROM (unlike the KL10 and KA780). This turned out to be incorrect; like most software, bugs were found regularly. The PCS was designed to store the basic microcode in PROM, but to allow it to be 'patched' dynamically.
CPU options used other boards:
- L0006 - KC750 Remote Diagnostic Module (RDM)
- L0001 - FP750 Floating-Point Accelerator (FPA)
The base CPU does support floating point, but implemented entirely in microcode; the FP750 increases floating-point performance substantially.
Backplane details
As mentioned in the main /750 article, the CPU slots in the backplane are all customized to particular cards by the buses which run to that slot. The MBus and WBus both run to the DPM, MIC and FPA cards/slots; the UBI card/slot has only the WBus, but not the MBus. The CMI runs to some cards/slots - MIC and UBI - but not others: not the DPM, nor the FPA.
External links
- VAX-11/750 Central Processing Unit Technical Description
- Introduction to the COMET Microarchitecture
- KA750 Field Maintenance Print Set (MP01024)
- PCS Module Field Maintenance Print Set (MP01390)
- L0002 (DPM) - Data Path Module image
- L0003 (MIC) - Memory Interconnect image
- L0008 (PCS) - Patchable Control Store image
