Difference between revisions of "Talk:NSWIT"
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* [https://github.com/pdp11/nswit/blob/master/sail/ncp.pal%5bncp%2Ccbf%5d490 Host/Host protocol] | * [https://github.com/pdp11/nswit/blob/master/sail/ncp.pal%5bncp%2Ccbf%5d490 Host/Host protocol] | ||
* [https://github.com/pdp11/nswit/blob/master/sail/tn.pal%5bncp%2Ccbf%5d490 TELNET] - server code commented out however | * [https://github.com/pdp11/nswit/blob/master/sail/tn.pal%5bncp%2Ccbf%5d490 TELNET] - server code commented out however | ||
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+ | == Newman == | ||
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+ | Reading the NMCVR file, I get the impression the Newman device might be a Chaos network interface, perhaps with DMA. No wait, reading NMDFS I see it can talk several PDP-11 machines. So some kind of message passing? The device is also called the "NM-crock", and referred to as a "memory system". [[User:Larsbrinkhoff|Larsbrinkhoff]] ([[User talk:Larsbrinkhoff|talk]]) 08:24, 10 February 2025 (CET) | ||
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+ | It seems to be a multiprocessor shared memory. Each processor can map in one or two windows into this memory, and also send interrupts to other processors. [[User:Larsbrinkhoff|Larsbrinkhoff]] ([[User talk:Larsbrinkhoff|talk]]) 09:57, 10 February 2025 (CET) | ||
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+ | : Yes, that was roughly my guess ([[Talk:Network Control Program (ARPANET)#What is an NCP implementation?|here]]) - "maybe a shared memory between several machines". The details are interesting - if you work them out, maybe do a page on it? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 16:51, 10 February 2025 (CET) |
Latest revision as of 16:51, 10 February 2025
NCP code
In case someone wants to check:
- IMP interface
- Host/Host protocol
- TELNET - server code commented out however
Newman
Reading the NMCVR file, I get the impression the Newman device might be a Chaos network interface, perhaps with DMA. No wait, reading NMDFS I see it can talk several PDP-11 machines. So some kind of message passing? The device is also called the "NM-crock", and referred to as a "memory system". Larsbrinkhoff (talk) 08:24, 10 February 2025 (CET)
It seems to be a multiprocessor shared memory. Each processor can map in one or two windows into this memory, and also send interrupts to other processors. Larsbrinkhoff (talk) 09:57, 10 February 2025 (CET)