Difference between revisions of "KEF11-A floating point chip"
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The KEF11-A requires the [[KTF11-A memory management chip]], since the floating point registers are actually in the KTF11-A (probably because the KEF11-A is microcode, and there aren't enough pins for both the data bus, and the microcode bus). | The KEF11-A requires the [[KTF11-A memory management chip]], since the floating point registers are actually in the KTF11-A (probably because the KEF11-A is microcode, and there aren't enough pins for both the data bus, and the microcode bus). | ||
| − | The KEF11-A is another dual carrier | + | The KEF11-A is another dual carrier: the chips being DEC part # 23-002C7-AA and DEC part # 23-003C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with the same chip versions as the -01). |
Revision as of 22:41, 17 November 2017
The KEF11-A floating point chip is an optional chip for PDP-11 CPUs which use the F-11 chip set. It implemented the FP11-compatible floating point.
The KEF11-A requires the KTF11-A memory management chip, since the floating point registers are actually in the KTF11-A (probably because the KEF11-A is microcode, and there aren't enough pins for both the data bus, and the microcode bus).
The KEF11-A is another dual carrier: the chips being DEC part # 23-002C7-AA and DEC part # 23-003C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with the same chip versions as the -01).
