Difference between revisions of "National Semiconductor NS23C QBUS memory"

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==Identification==
 
==Identification==
  
Unlike the [[National Semiconductor NS23M QBUS memory|NS23M]], the NS23C [[printed circuit board]] does contain identification which indicates that it is an NS23C; in addition, the PCB says "PWB 551010105-002" on the solder side, and "PWA980010105" on the component side.
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Unlike the [[National Semiconductor NS23M QBUS memory|NS23M]], the NS23C [[printed circuit board]] does contain identification which indicates that it is an NS23C; in addition, the PCB says "PWB 551010105-002" on the solder side, and "PWA 980010105" on the component side.
  
 
==256KB to 1M Upgrade==
 
==256KB to 1M Upgrade==

Revision as of 03:35, 29 November 2017

The National Semiconductor NS23C is a QBUS memory card in dual QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs), or 1 Mbyte (un-documented, using 256Kx1 DRAMs).

Identification

Unlike the NS23M, the NS23C printed circuit board does contain identification which indicates that it is an NS23C; in addition, the PCB says "PWB 551010105-002" on the solder side, and "PWA 980010105" on the component side.

256KB to 1M Upgrade

It is very easy to upgrade these card from 256KB to 1MB, as it has all the necessary traces, jumpers, etc for this capability built into the card - even though the NS23C documentation says nothing about this capability!

Looking at the prints, the memory chips have all 9 address lines wired (unlike the very similar NS23M card), and there are a couple of jumpers that adapt the card to 1MB operation. The chips are all in sockets, so pulling the 64Kx1's and replacing them with 256Kx1's should be easy.

There are three jumpers one has to remove/move; alas, they are in the PCB on the top surface, although there are jumper pins there - there's a trace running between the two pins - so you have to cut the traces.

The first two jumpers one has to remove are W23 and W24 (right next to the other memory size jumpers), which allow one to increase the maximum memory size to 1MB.

The other jumper one has to move, is to move the 'jumper' from W40 to W41; this moves the pickup point for the 'RS0' signal, which indicates which bank of chips (there are 2x18 banks, i.e. 16 data, and separate byte parity) to activate, from address line 17 to 19.

Fault Isolation

The way the address logic works on the card is slightly odd; if the card is not on a 'natural' boundary [e.g. a 256KB boundary, if it's a 256KB card], the memory contents are scrambled; the low memory, in bus address terms, is at the top of the card, in chip terms, and the high memory, in bus terms, is at the bottom of the card.

They did it that way because that's the most economical way to do it in logic/traces, etc but it's something one would have to remember when looking for a bad memory chip, if the card is set to an address which is not a multiple of its size.