Access time: Difference between revisions
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In [[Dynamic RAM|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle. | In [[Dynamic RAM|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle. | ||
==See also== | |||
* [[Cycle time]] | |||
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Revision as of 11:26, 6 July 2018
In main memory, the access time is the time period between the start of a read access cycle, and the point in time when the data is returned to the requestor.
In DRAM memories, if the memory is in the middle of a refresh cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.
