Difference between revisions of "Memory interleaving"
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This did mean that sequential words in the actual memory would be in different blocks of the [[address space]], but keeping the words in order would have required a lot more wiring (to effectively shift the entire local part of the address down one bit). It was much simpler to simply accept the unusual order (which the CPU could not see, anyway). | This did mean that sequential words in the actual memory would be in different blocks of the [[address space]], but keeping the words in order would have required a lot more wiring (to effectively shift the entire local part of the address down one bit). It was much simpler to simply accept the unusual order (which the CPU could not see, anyway). | ||
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Revision as of 13:23, 19 October 2018
Interleaving is a technique for speeding up access to sequential main memory addresses (e.g. by the CPU as it executes a program) for memories which have a cycle time which is significantly longer than their access time, such as core memory.
It consists of assigning sequential addresses to different memory units; so that a reference to word A goes to one bank, and a following reference to word A+1 goes to the other. This is called 'two-way interleaving', but it was possible to extend the technique; e.g. the KL10 could use four-way interleaving.
The implementation was fairly simple; switches were provided which exchanged two of the bits on the address bus as they were fed into each memory unit; the two bits would be the low bit of the word address (since some memories were byte addressed), and the bit just about the highest bit of the memory's local address. Thus, sequential addresses (on the bus) would alternate between memory units.
This did mean that sequential words in the actual memory would be in different blocks of the address space, but keeping the words in order would have required a lot more wiring (to effectively shift the entire local part of the address down one bit). It was much simpler to simply accept the unusual order (which the CPU could not see, anyway).
