Difference between revisions of "KTF11-A memory management chip"
From Computer History Wiki
m (too lg) |
m (+link) |
||
| Line 5: | Line 5: | ||
The [[KEF11-A floating point]] chip option requires the KTF11-A, since the [[floating point]] [[register]]s are actually in the KTF11-A (the reason is unknown; the KEF11-A is [[microcode]], but there are enough pins for both the [[data bus]], and the microcode bus). | The [[KEF11-A floating point]] chip option requires the KTF11-A, since the [[floating point]] [[register]]s are actually in the KTF11-A (the reason is unknown; the KEF11-A is [[microcode]], but there are enough pins for both the [[data bus]], and the microcode bus). | ||
| − | The KTF11-A chip was the DC304, DEC part | + | The KTF11-A chip was the DC304, [[DEC part number]] 21-15542-0n (where n is a digit giving the revision; 0 and 1 have been seen). |
| − | |||
| − | |||
[[Category: PDP-11 Processors]] | [[Category: PDP-11 Processors]] | ||
Latest revision as of 12:41, 12 August 2022
The KTF11-A memory management chip is an optional chip for PDP-11 CPUs which use the F-11 chip set. It implemented the standard PDP-11 Memory Management (but only the simplified subset).
The KEF11-A floating point chip option requires the KTF11-A, since the floating point registers are actually in the KTF11-A (the reason is unknown; the KEF11-A is microcode, but there are enough pins for both the data bus, and the microcode bus).
The KTF11-A chip was the DC304, DEC part number 21-15542-0n (where n is a digit giving the revision; 0 and 1 have been seen).
