KEF11-A floating point chip: Difference between revisions
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The KEF11-A is another dual carrier: the chips on it are [[DEC part number]]s 23-002C7-AA and 23-003C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with the same chip versions as the -01). | The KEF11-A is another dual carrier: the chips on it are [[DEC part number]]s 23-002C7-AA and 23-003C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with the same chip versions as the -01). | ||
==Further reading== | |||
* ''11/23 Floating Point Compatibility'', [[MicroNote]] #066 | |||
[[Category: PDP-11 Processors]] | [[Category: PDP-11 Processors]] | ||
Revision as of 14:42, 25 July 2024
The KEF11-A floating point chip is an optional chip for PDP-11 CPUs which use the F-11 chip set. It contains microcode to implement the FP11-compatible floating point.
The KEF11-A requires the KTF11-A memory management chip, since the floating point registers are actually in the KTF11-A (the reason why is unknown; although the KEF11-A is microcode, there are enough pins for both the data bus, and the microcode bus).
The KEF11-A is another dual carrier: the chips on it are DEC part numbers 23-002C7-AA and 23-003C7-AA (only the A revision of both has been seen). The entire carrier is DEC part # 57-00001-01-A1 (although 57-00001-00 is occasionally seen - but with the same chip versions as the -01).
Further reading
- 11/23 Floating Point Compatibility, MicroNote #066
